Semiconductor device and method for measuring current of semiconductor device

Patent metadata

Field	Value
Publication number	US-10559667-B2
Application number	US-201514830817-A
Country	US
Kind code	B2
Filing date	Aug 20, 2015
Priority date	Aug 25, 2014
Publication date	Feb 11, 2020
Grant date	Feb 11, 2020

Abstract

A semiconductor device in which a transistor has the characteristic of low off-state current is provided. The transistor comprises an oxide semiconductor layer having a channel region whose channel width is smaller than 70 nm. A temporal change in off-state current of the transistor over time can be represented by Formula (a2). In Formula (a2), I OFF represents the off-state current, t represents time during which the transistor is off, α and τ are constants, β is a constant that satisfies 0<β≤1, and C S is a constant that represents load capacitance of a source or a drain.

I
OFF

⁡

(
t
)

=

C
S

×

α
×
β

τ
β

×

t

β
-
1

×

e

-

(

t
τ

)

β

(

a
⁢

⁢
2

)

First claim

What is claimed is:

1. A semiconductor device comprising:
a first transistor comprising:
a first gate;
a first gate insulating film over the first gate;
a first oxide semiconductor layer over the first gate insulating film, the first oxide semiconductor layer including a channel formation region overlapping with the first gate, wherein a width of the channel formation region is smaller than 70 nm;
a first conductive film and a second conductive film each over and in contact with a first region and a second region of a top surface of the first oxide semiconductor layer;
a second oxide semiconductor layer over and in contact with a top surface and side surfaces of each of the first conductive film and the second conductive film, and a third region of the top surface and side surfaces of the first oxide semiconductor layer;
a second gate insulating film over the second oxide semiconductor layer; and
a second gate over the second gate insulating film, the second gate overlapping with the channel formation region,

wherein a temporal change of off-state current of the first transistor is represented by Formula (a2):

I
OFF

⁡

(
t
)

=

C
S

×

α
×
β

τ
β

×

t

β
-
1

×

e

-

(

t
τ

)

β

(
a2
)

wherein I OFF represents the off-state current, t represents time during which the first transistor is off, α and τ are constants, β is a constant that satisfies 0<β≤1 , and C S is a constant that represents load capacitance of a source or a drain of the first transistor.

2. The semiconductor device according to claim 1 , wherein the off-state current at room temperature is less than 1×10 −20 A when t is 1×10 5 seconds.

3. The semiconductor device according to claim 1 , wherein each of the first and second oxide semiconductor layers comprises indium, gallium, and zinc.

4. A semiconductor device comprising:
a first transistor comprising:
a first gate;
a first gate insulating film over the first gate;
a first oxide semiconductor layer over the first gate insulating film, the first oxide semiconductor layer including a channel formation region overlapping with the first gate, wherein a width of the channel formation region is smaller than 70 nm;
a first conductive film and a second conductive film each over and in contact with a first region and second region of a top surface of the first oxide semiconductor layer;
a second oxide semiconductor layer over and in contact with a top surface and side surfaces of each of the first conductive film and the second conductive film, and a third region of the top surface and side surfaces of the first oxide semiconductor layer;
a second gate insulating film over the second oxide semiconductor layer, the first conductive film, and the second conductive film; and
a second gate over the second gate insulating film, the second gate overlapping with the channel formation region; and

a capacitor having a terminal electrically connected to one of the first conductive film and the second conductive film of the first transistor,
wherein a temporal change of off-state current of the first transistor is represented by Formula (a2):

I
OFF

⁡

(
t
)

=

C
S

×

α
×
β

τ
β

×

t

β
-
1

×

e

-

(

t
τ

⁢

)

β

⁢

(
a2
)

wherein I OFF represents the off-state current, t represents time during which the first transistor is off, α and τ are constants, β is a constant that satisfies 0<β≤1, and C S is a constant that represents capacitance of the capacitor.

5. The semiconductor device according to claim 4 , wherein the off-state current at room temperature is less than 1×10 −20 A when t is 1×10 5 seconds.

6. The semiconductor device according to claim 4 , wherein each of the first and second oxide semiconductor layers comprises indium, gallium, and zinc.

7. The semiconductor device

Assignees

• Semiconductor Energy Lab

Inventors

• Tsubuku Masashi
• Yamazaki Shunpei
• Kobayashi Hidetomo
• Ohshima Kazuaki
• Fujita Masashi
• Takeuchi Toshihiko

Classifications

• G01R31/2608

  for testing bipolar transistors · CPC title

• G01R19/0092

  Measuring current only · CPC title

• G01R31/2621

  for testing field effect transistors, i.e. FET's · CPC title

• H10P74/207

  Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics · CPC title

• H01L29/7869

  Electricity · mapped topic