Display substrate, liquid crystal display panel and fabricating method thereof, and liquid crystal display apparatus

US10558073B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10558073-B2
Application numberUS-201615565374-A
CountryUS
Kind codeB2
Filing dateNov 4, 2016
Priority dateNov 4, 2016
Publication dateFeb 11, 2020
Grant dateFeb 11, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

The present application discloses a liquid crystal display panel including an array substrate having a data line layer including a plurality of columns of data lines; a counter substrate facing the array substrate, including a base substrate and a conductive material layer on the base substrate having a plurality of conductive material columns for preventing light leakage; and a black matrix layer having a plurality of black matrix columns corresponding to the plurality of conductive material columns and the plurality of columns of data lines.

First claim

Opening claim text (preview).

What is claimed is: 1. A liquid crystal display panel, comprising: an array substrate comprising a common electrode layer in a subpixel region of the liquid crystal display panel, a first insulating layer on the common electrode layer, a data line layer including a plurality of columns of data lines and on a side of the first insulating layer away from the common electrode layer, a second insulating layer on a side of the data line layer away from the first insulating layer, and a pixel electrode layer on a side of the second insulating layer away from the data line layer; a counter substrate facing the array substrate, the counter substrate comprising a base substrate and a conductive material layer on the base substrate, the conductive material layer comprising a plurality of conductive material columns for preventing light leakage; and a black matrix layer comprising a plurality of black matrix columns; wherein an orthographic projection of a respective one of the plurality of conductive material columns on the base substrate at least partially overlaps with an orthographic projection of a respective one of the plurality of black matrix columns on the base substrate. 2. The liquid crystal display panel of claim 1 , wherein the conductive material layer is configured to be provided with a common electrode voltage. 3. The liquid crystal display panel of claim 1 , wherein the conductive material layer is a floating electrode layer having a floating potential and is not electrically connected to any voltage supply unit. 4. The liquid crystal display panel of claim 1 , wherein a width of each of the plurality of conductive material columns is substantially equal to or less than that of the corresponding black matrix column. 5. The liquid crystal display panel of claim 1 , wherein a ratio of a width of each of the plurality of conductive material columns to a width of the corresponding black matrix column is in the range of approximately 1:10 to approximately 1.1:1. 6. The liquid crystal display panel of claim 1 , wherein a ratio of a width of each of the plurality of conductive material columns to a width of a corresponding column of data line is in the range of approximately 0.8:1 to approximately 1.2:1. 7. The liquid crystal display panel of claim 6 , wherein the width of each of the plurality of conductive material columns is substantially equal to the width of the corresponding column of data line. 8. The liquid crystal display panel of claim 1 , wherein the common electrode layer is electrically connected to the conductive material layer in the counter substrate. 9. The liquid crystal display panel of claim 1 , wherein the conductive material layer is made of a transparent metal material. 10. The liquid crystal display panel of claim 1 , wherein the black matrix layer is in the counter substrate; and the conductive material layer is on a side of the black matrix layer facing the base substrate of the counter substrate. 11. A liquid crystal display apparatus, comprising a liquid crystal display panel of claim 1 . 12. A method of fabricating a liquid crystal display panel, comprising forming an array substrate and forming a counter substrate facing the array substrate; wherein forming the array substrate comprises forming a common electrode layer in a subpixel region of the liquid crystal display panel, forming a first insulating layer on the common electrode layer, forming a data line layer including a plurality of columns of data lines and on a side of the first insulating layer away from the common electrode layer, forming a second insulating layer on a side of the data line layer away from the first insulating layer, and forming a pixel electrode layer on a side of the second insulating layer away from the data line layer; and forming the counter substrate comprises forming a conductive material layer on a base substrate, the conductive material layer formed to comprise a plurality of conductive material columns for preventing light leakage; the method further comprising forming a black matrix layer comprising a plurality of black matrix columns; wherein the black matrix layer is formed so that an orthographic projection of a respective one of the plurality of conductive material columns on the base substrate at least partially overlaps with an orthographic projection of a respective one of the plurality of black matrix columns on the base substrate. 13. The method of claim 12 , wherein the conductive material layer is formed as a floating electrode layer having a floating potential and is not electrically connected to any voltage supply unit. 14. The method of claim 12 , wherein a ratio of a width of each of the plurality of conductive material columns to a width of a corresponding column of data line is in the range of approximately 0.8:1 to approximately 1.2:1. 15. The method of claim 12 , wherein the common electrode layer is formed to be electrically connected to the conductive material layer in the counter substrate. 16. The liquid crystal display panel of claim 1 , wherein an orthographic projection of a respective one of the plurality of columns of data lines on the base substrate is non-overlapping with an orthographic projection of the common electrode layer on the base substrate. 17. The liquid crystal display panel of claim 1 , wherein an orthographic projection of a respective one of the plurality of columns of data lines on the base substrate is non-overlapping with an orthographic projection of the pixel electrode layer on the base substrate. 18. The liquid crystal display panel of claim 1 , wherein the orthographic projection of the respective one of the plurality of black matrix columns on the base substrate partially overlaps with an orthographic projection of the pixel electrode layer on the base substrate. 19. The method of claim 12 , wherein an orthographic projection of a respective one of the plurality of columns of data lines on the base substrate is non-overlapping with an orthographic projection of the common electrode layer on the base substrate. 20. The method of claim 12 , wherein an orthographic projection of a respective one of the plurality of columns of data lines on the base substrate is non-overlapping with an orthographic projection of the pixel electrode layer on the base substrate.

Assignees

Inventors

Classifications

  • Arrangements for improving the aperture ratio · CPC title

  • Wiring, e.g. gate line, drain line · CPC title

  • pixel · CPC title

  • Light shielding layers, e.g. black matrix (G02F1/136209 takes precedence) · CPC title

  • for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS] · CPC title

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What does patent US10558073B2 cover?
The present application discloses a liquid crystal display panel including an array substrate having a data line layer including a plurality of columns of data lines; a counter substrate facing the array substrate, including a base substrate and a conductive material layer on the base substrate having a plurality of conductive material columns for preventing light leakage; and a black matrix la…
Who is the assignee on this patent?
Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/133512. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 11 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).