Robust line coding scheme for communication under severe external noises

US10554333B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10554333-B2
Application numberUS-201715784027-A
CountryUS
Kind codeB2
Filing dateOct 13, 2017
Priority dateMay 9, 2014
Publication dateFeb 4, 2020
Grant dateFeb 4, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A system to implement a communication line coding scheme using a non-complex bit-to-symbol mapping, a forward error correction (FEC) coding, and an additive bit scrambler after the FEC at the PHY layer is provided. The system may be a part of or implemented by an automobile component. The system may be a PHY device configured to convert data from the MAC layer into 2D-PAM3 symbols that are transmitted across a communication link at a predetermined transmission rate, such as to be compliant with a communication standard. The PHY device may select characteristics of the conversion, such as the FEC coded symbol, based on the target transmission rate. The PHY device may include a transceiver, and may convert the data from MAC layer to PHY layer and back.

First claim

Opening claim text (preview).

What is claimed is: 1. A device comprising: hybrid circuitry coupled to a communication interface circuitry, the communication interface circuitry configured to transmit first analog signals over a communication link and receive second analog signals over the communication link; transmitter circuitry coupled to the communication interface circuitry via the hybrid circuitry, the transmitter circuitry configured to convert first digital data to the first analog signals and provide the first analog signals to the hybrid circuitry for transmission over the communication link via the communication interface circuitry; and receiver circuitry coupled to the communication interface circuitry via the hybrid circuitry, the receiver circuitry configured to receive the second analog signals from the hybrid circuitry, the second analog signals having been received over the communication link via the communication interface circuitry, wherein the hybrid circuitry is configured to use the first analog signals provided by the transmitter circuitry to cancel the first analog signals that are coupled into the second analog signals received over the communication link via the communication interface circuitry. 2. The device of claim 1 , wherein the hybrid circuitry is further configured to reduce electric signal reflections due to transmitting the first analog signals and receiving the second analog signals over the same communication link. 3. The device of claim 1 , further comprising an echo canceller coupled to the transmitter circuitry and the receiver circuitry, wherein the echo canceller is configured to digitally mitigate residual reflected signals from the transmitter circuitry. 4. The device of claim 3 , wherein the echo canceller is coupled to an input of an analog front end of the transmitter circuitry and the echo canceller is separately coupled to an output of an analog front end of the receiver circuitry. 5. The device of claim 4 , wherein the analog front end of the transmitter circuitry is configured to convert the first digital data to the first analog signals and the analog front end of the receiver circuitry is configured to convert the second analog signals to second digital data. 6. The device of claim 5 , wherein the echo canceller is further configured to remove remnants of the first digital data that is included in the second digital data after cancellation of the first analog signals from the second analog signals by the hybrid circuitry. 7. The device of claim 1 , wherein the transmitter circuitry and the receiver circuitry are separately coupled to the hybrid circuitry. 8. The device of claim 1 , wherein the device is communicatively coupled to an automobile component. 9. The device of claim 1 , wherein the first digital data comprises binary data and corresponding management information and the first analog signals comprise forward error correction (FEC) frames that contain the binary data and the management information. 10. The device of claim 9 , further comprising a scrambler circuitry configured to scramble the FEC frames exclusive of the management information, wherein the first analog signals comprise the scrambled FEC frames exclusive of the management information. 11. A method comprising: transmitting first analog signals over a communication link by a transmitter circuitry via a hybrid circuitry; receiving second analog signals over the communication link by a receiver circuitry via the hybrid circuitry; and cancelling, via the hybrid circuitry, reflections of the first analog signals coupled into the second analog signals received over the communication link using the transmitted first analog signals. 12. The method of claim 11 , further comprising: converting, by an analog front end of the transmitter circuitry, first digital data to the first analog signals; and converting, by an analog front end of the receiver circuitry, the second analog signals to second digital data. 13. The method of claim 12 , further comprising: removing, by a digital echo canceller, remnants of the first digital data that is included in the second digital data after cancellation of the reflections of the first analog signals from the second analog signals by the hybrid circuitry. 14. The method of claim 13 , wherein the echo canceller is coupled to an input of the analog front end of the transmitter circuitry and the echo canceller is coupled to an output of the analog front end of the receiver circuitry. 15. The method of claim 13 , wherein the first digital data is received from an automobile component. 16. The method of claim 14 , wherein the hybrid circuitry is coupled to an output of the transmitter circuitry and the hybrid circuitry is coupled to an input of the receiver circuitry. 17. The method of claim 16 , wherein the hybrid circuitry is further coupled to communication interface circuitry, the first analog signals are transmitted over the communication link via the communication interface circuitry, and the second analog signals are received over the communication link via the communication interface circuitry. 18. A system comprising: transmitter circuitry configured to convert first digital data to first analog signals and provide the first analog signals to a hybrid circuitry for transmission over a communication link, the first digital data being received from an automobile component; receiver circuitry configured to receive second analog signals from the hybrid circuitry, convert the second analog signals to second digital data, and provide the second digital data for transmission to the automobile component, the second analog signals having been received via the hybrid circuitry over the communication link; and the hybrid circuitry configured to cancel any of the first analog signals that are coupled into the second analog signals that are received over the communication link prior to providing the second analog signals to the receiver circuitry. 19. The system of claim 18 , further comprising: an echo canceller configured to remove remnants of the first digital data that is included in the second digital data after cancellation, by the hybrid circuitry, of the any of the first analog signals that are coupled into the second analog signals. 20. The system of claim 18 , wherein the first digital data comprises binary data and corresponding management information and the first analog signals comprise forward error correction (FEC) frames that contain the binary data and the management information.

Assignees

Inventors

Classifications

  • Encoding specially adapted to other signal generation operation, e.g. in order to reduce transmit distortions, jitter, or to improve signal shape (H04L1/0067 takes precedence) · CPC title

  • H04L1/0041Primary

    Arrangements at the transmitter end · CPC title

  • Modulator circuits; Transmitter circuits · CPC title

  • specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks · CPC title

  • using multilevel codes · CPC title

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Frequently asked questions

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What does patent US10554333B2 cover?
A system to implement a communication line coding scheme using a non-complex bit-to-symbol mapping, a forward error correction (FEC) coding, and an additive bit scrambler after the FEC at the PHY layer is provided. The system may be a part of or implemented by an automobile component. The system may be a PHY device configured to convert data from the MAC layer into 2D-PAM3 symbols that are tran…
Who is the assignee on this patent?
Avago Technologies General Ip, Avago Tech Int Sales Pte Lid
What technology area does this patent fall under?
Primary CPC classification H04L1/0041. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 04 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).