Regulator for reducing power consumption

Patent metadata

Field	Value
Publication number	US-10551860-B2
Application number	US-201916258917-A
Country	US
Kind code	B2
Filing date	Jan 28, 2019
Priority date	Jan 29, 2018
Publication date	Feb 4, 2020
Grant date	Feb 4, 2020

Abstract

There is provided a regulator including: a first transistor connected between an input terminal and an output terminal; a feedback circuit configured to control a control voltage of a control electrode of the first transistor so that a voltage of the output terminal reaches a target voltage according to a feedback voltage proportional to an output voltage; a second transistor having a control electrode to which the control voltage is applied in common with the first transistor; a first resistor connected with the second transistor in series between the input terminal and the output terminal; and a current limiting circuit configured to detect a voltage generated across the first resistor and to change the control voltage so as to limit a current flowing through the first transistor.

First claim

What is claimed is:

1. A regulator, comprising:
a first transistor connected between an input terminal and an output terminal;
a feedback circuit configured to control a control voltage of a control electrode of the first transistor so that a voltage of the output terminal reaches a target voltage according to a feedback voltage proportional to an output voltage;
a second transistor having a control electrode to which the control voltage is applied in common with the first transistor;
a first resistor connected with the second transistor in series between the input terminal and the output terminal; and
a current limiting circuit including a third transistor having a source connected to a drain of the second transistor, and configured to apply a voltage generated across the first resistor between a gate and the source of the third transistor, and to change the control voltage so as to limit a current flowing through the first transistor when the third transistor is turned on.

2. The regulator of claim 1 , wherein the first transistor and the second transistor are P-channel type field effect transistors whose source electrodes are connected to each other,
and
wherein the third transistor is a P-channel type field effect transistor having a drain connected to gates of the first transistor and the second transistor.

3. The regulator of claim 1 , wherein the first transistor and the second transistor are P-channel type field effect transistors whose source electrodes are connected to each other, and
wherein the third transistor is a P-channel type field effect transistor, and the current limiting circuit includes a circuit configured to increase voltages of gates of the first transistor and the second transistor when the third transistor is turned on.

4. The regulator of claim 1 , wherein the first transistor and the second transistor are P-channel type field effect transistors whose source electrodes are connected to each other, and
wherein the third transistor is a P-channel type field effect transistor, and the current limiting circuit includes a circuit configured to control the feedback circuit so as to increase an output of the feedback circuit when the third transistor is turned on.

5. A regulator, comprising:
a first transistor connected between an input terminal and an output terminal;
a feedback circuit configured to control a control voltage of a control electrode of the first transistor so that a voltage of the output terminal reaches a target voltage according to a feedback voltage proportional to an output voltage;
a second transistor having a control electrode to which the control voltage is applied in common with the first transistor;
a first resistor connected with the second transistor in series between the input terminal and the output terminal; and
a current limiting circuit configured to detect a voltage generated across the first resistor and to change the control voltage so as to limit a current flowing through the first transistor,
wherein the first transistor and the second transistor are P-channel type field effect transistors whose source electrodes are connected to each other,
wherein the current limiting circuit includes a third transistor, and
wherein the third transistor is a P-channel type field effect transistor having a source connected to a drain of the second transistor, and a drain connected to gates of the first transistor and the second transistor, so that the voltage generated across the first resistor is applied between a gate and the source of the third transistor.

6. A regulator, comprising:
a first transistor connected between an input terminal and an output terminal;
a feedback circuit configured to control a control voltage of a control electrode of the first transistor so that a voltage of the output terminal reaches a target voltage according to a feedback voltage proportional to an output voltage;
a second transistor having a control electrode to which the control voltage is applied in common with the first transistor;
a first resistor connected with the second transistor in series between the input terminal and the output terminal; and
a current limiting circuit configured to detect a voltage generated across the first resistor and to change the control voltage so as to limit a current flowing through the first transistor,
wherein the first transistor and the second transistor are P-channel type field effect transistors whose source electrodes are connected to each other, and
wherein the current limiting circuit includes a third transistor as a P-channel type field effect transistor having a source connected to a drain of the second transistor so that the voltage generated across the first resistor is applied between a gate and the source of the third transistor, and a circuit configured to increase voltages of gates of the first transistor and the second transistor when the third transistor is turned on.

7. A regulator, comprising:
a first transistor connected between an input terminal and an output terminal;
a feedback circuit configured to control a control voltage of a control electrode of the first transistor so that a voltage of the output terminal reaches a target voltage according to a feedback voltage proportional to an output voltage;
a second transistor having a control electrode to which the control voltage is applied in common with the first transistor;
a first resistor connected with the second transistor in series between the input terminal and the output terminal; and
a current limiting circuit configured to detect a voltage generated across the first resistor and to change the control voltage so as to limit a current flowing through the first transistor,
wherein the first transistor and the second transistor are P-channel type field effect transistors whose source electrodes are connected to each other, and
wherein the current limiting circuit includes a third transistor as a P-channel type field effect transistor having a source connected to a drain of the second transistor so that the voltage generated across the first resistor is applied between a gate and the source of the third transistor, and a circuit configured to control the feedback circuit so as to increase an output of the feedback circuit when the third transistor is turned on.

Assignees

• Rohm Co Ltd

Inventors

• Yasusaka Makoto

Classifications

• G05F1/445

  being transistors in series with the load · CPC title

• G05F1/565

  sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor (G05F1/563 takes precedence) · CPC title

• G05F1/575 Primary

  characterised by the feedback circuit · CPC title

• H02M3/156

  with automatic control of output voltage or current, e.g. switching regulators · CPC title