Bias circuit and power amplifier having the same

Patent metadata

Field	Value
Publication number	US-10547307-B2
Application number	US-201816009382-A
Country	US
Kind code	B2
Filing date	Jun 15, 2018
Priority date	Nov 10, 2014
Publication date	Jan 28, 2020
Grant date	Jan 28, 2020

Abstract

A bias circuit providing different bias voltages depending on a power mode through a simple circuit, and a power amplifier having the same are provided. The bias circuit and the power amplifier include a bias setting unit configured to vary a voltage level of a control signal controlling a bias voltage according to an operation of a first transistor being switched-off in a high power mode and switched-on in a low power mode. A bias supplying unit includes a bias supplying transistor switched based on the control signal, to supply the bias voltage having a voltage level according to a switching operation of the bias supplying transistor.

First claim

What is claimed is:

1. A bias circuit, comprising:
a bias setting unit configured to vary a voltage level of a control signal in response to a selected power mode signal, and comprising a first transistor configured to receive the selected power mode signal, wherein a signal level of the control signal is determined based on a sum of a base-emitter voltage of a second transistor and a base-emitter voltage of a third transistor; and
a bias supplying unit configured to supply a bias voltage having a voltage level determined based on the voltage level of the control signal, and comprising a bias supplying transistor,
wherein the first transistor is directly connected to the bias supplying transistor through a first resistor.

2. The bias circuit of claim 1 , wherein the bias setting unit varies the voltage level of the control signal in response to an operation of the first transistor switched-off in a high power mode of the selected power mode signal and switched-on in a low power mode of the selected power mode signal.

3. The bias circuit of claim 2 , wherein the bias supplying unit comprises an impedance between the bias supplying transistor and a bias node,
wherein the bias supplying transistor sets a bias voltage at the bias node in the low power mode and the high power mode based on the control signal.

4. The bias circuit of claim 3 , wherein the bias setting unit comprises:
a control signal providing unit configured to provide the control signal having a level set according to a voltage level of a reference power; and
a control signal varying unit comprising the first transistor and the first resistor connected to a collector of the first transistor, wherein the first transistor is switched-off in the high power mode to maintain the signal level of the control signal and is switched-on in the low power mode to reduce the signal level of the control signal.

5. A bias circuit, comprising:
a bias setting unit configured to vary a voltage level of a control signal in response to a selected power mode signal, and comprising a first transistor configured to receive the selected power mode signal; and
a bias supplying unit configured to supply a bias voltage having a voltage level determined based on the voltage level of the control signal, and comprising a bias supplying transistor,
wherein the first transistor is directly connected to the bias supplying transistor through a first resistor,
wherein the bias setting unit varies the voltage level of the control signal in response to an operation of the first transistor switched-off in a high power mode of the selected power mode signal and switched-on in a low power mode of the selected power mode signal,
wherein the bias supplying unit comprises an impedance between the bias supplying transistor and a bias node,
wherein the bias supplying transistor sets a bias voltage at the bias node in the low power mode and the high power mode based on the control signal,
wherein the bias setting unit comprises:
a control signal providing unit configured to provide the control signal having a level set according to a voltage level of a reference power; and
a control signal varying unit comprising the first transistor and the first resistor connected to a collector of the first transistor,

wherein the first transistor is switched-off in the high power mode to maintain the signal level of the control signal and is switched-on in the low power mode to reduce the signal level of the control signal, and
wherein the control signal providing unit comprises a second transistor, a third transistor, a second resistor, and a third resistor,
the signal level of the control signal is determined according to a sum of a base-emitter voltage of the second transistor and a base-emitter voltage of the third transistor,
a resistance value of the second resistor determines a voltage level of the base-emitter voltage of the second transistor, and
a resistance value of the third resistor determines a voltage level of the base-emitter voltage of the third transistor.

6. The bias circuit of claim 5 , wherein the control signal providing unit further includes a capacitor stabilizing the reference power,
the first transistor comprises a base receiving the selected power mode signal having information regarding the power mode through a fourth resistor, and an emitter connected to a ground,
the second transistor comprises an emitter connected to the ground through the second resistor, and a base connected to the capacitor to be supplied with the reference power stabilized by the capacitor according to switching-on or switching-off of the third transistor, and
the third transistor has an emitter connected to the ground, a collector receiving the reference power through the third resistor, and a base connected to the emitter of the second transistor.

7. A power amplifier, comprising:
a bias circuit comprising
a bias setting unit configured to vary a voltage level of a control signal based on a selected power mode signal, and comprising a first transistor configured to receive the selected power mode signal, and
a bias supplying unit configured to supply a bias voltage having a voltage level determined based on the voltage level of the control signal, and comprising a bias supplying transistor; and
an amplifying unit configured to receive the bias voltage from the bias circuit to amplify a power level of an input signal,
wherein the first transistor is directly connected to the bias supplying transistor through a first resistor, and a signal level of the control signal is determined based on a sum of a base-emitter voltage of a second transistor and a base-emitter voltage of a third transistor.

8. The bias circuit of claim 7 , wherein the bias setting unit varies the voltage level of the control signal in response to an operation of the first transistor switched-off in a high power mode of the selected power mode signal and switched-on in a low power mode of the selected power mode signal.

9. The bias circuit of claim 8 , wherein the bias supplying unit comprises an impedance between the bias supplying transistor and a bias node,
wherein the bias supplying transistor sets a bias voltage at the bias node in the low power mode and the high power mode based on the control signal.

10. The power amplifier of claim 9 , further comprising:
an input matching circuit configured to match impedance of a signal transfer path between an input signal terminal from which the input signal is input, and the amplifying unit, and
an output matching circuit configured to match impedance of a signal transfer path between an output signal terminal to which an output signal amplified by the amplifying unit is output, and the amplifying unit.

11. The power amplifier of claim 9 , wherein the bias circuit reduces a voltage level of the bias voltage at a time of the low power mode to reduce current consumption of the amplifying unit.

12. The power amplifier of claim 9 , wherein the bias setting unit includes:
a control signal providing unit configured to provide the control signal having a level set according to a voltage level of received reference power; and
a control signal varying unit comprising the first transistor and the first resistor connected to a collector of the first transistor, the first transistor being switched-off in the high power mode to maintain the signal level of the control signal and being switched-on in the low power mode to reduce the signal level of the control signal.

13. The power amplifier of claim 12 , wherein the control signal providing unit comprises the second transistor, the third transistor, a second

Assignees

• Samsung Electro Mech

Inventors

• Won Jun Goo
• Kim Youn Suk
• Tonami Yoshiyuki
• Kim Ki Joong

Classifications

• H03F2200/21

  Bias resistors are added at the input of an amplifier · CPC title

• H03F3/19

  with semiconductor devices only · CPC title

• H03F3/245

  with semiconductor devices only · CPC title

• H03K17/60 Primary

  the devices being bipolar transistors (bipolar transistors having four or more electrodes H03K17/72) · CPC title

• H03F1/302

  in bipolar transistor amplifiers (H03F1/303, H03F1/305, H03F1/307 take precedence) · CPC title