Memory management method, memory storage device and memory control circuit unit

Patent metadata

Field	Value
Publication number	US-10545700-B2
Application number	US-201816004444-A
Country	US
Kind code	B2
Filing date	Jun 11, 2018
Priority date	Apr 12, 2018
Publication date	Jan 28, 2020
Grant date	Jan 28, 2020

Abstract

A memory management method for a memory storage device including a rewritable non-volatile memory module is provided according to an exemplary embodiment of the disclosure. The method includes: performing a data merge operation for at least one physical unit of the rewritable non-volatile memory module according to a write command from a host system; and adjusting times of performing the data merge operation according to a dispersion rate of a plurality of logical units corresponding to first data stored in at least one first-type physical unit of the rewritable non-volatile memory module.

First claim

What is claimed is:

1. A memory management method for a memory storage device including a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of physical units, at least one first-type physical unit among the physical units stores first data, the first data corresponds to a plurality of logical units, and the memory management method comprises:
performing at least one data merge operation for at least one of the physical units according to a write command from a host system; and
adjusting times of performing the at least one data merge operation according to a dispersion rate of the logical units corresponding to the first data.

2. The memory management method according to claim 1 , wherein the dispersion rate of the logical units is positively correlated to a number of at least one table recording logical-to-physical mapping information of the first data.

3. The memory management method according to claim 1 , wherein the step of performing the at least one data merge operation for the at least one of the physical units according to the write command from the host system comprises:
performing at least one accessing event for the at least one of the physical units according to the write command from the host system,
wherein the at least one accessing event comprises at least one of a data reading event, a data writing event and a table reading event.

4. The memory management method according to claim 1 , wherein the step of adjusting the times of performing the at least one data merge operation according to the dispersion rate of the logical units corresponding to the first data comprises:
obtaining a first event count according to the dispersion rate; and
adjusting times of performing at least one accessing event corresponding to the write command according to the first event count.

5. The memory management method according to claim 4 , wherein the step of obtaining the first event count according to the dispersion rate comprises:
obtaining the first event count according to the dispersion rate and valid data storage information of the at least one first-type physical unit,
wherein the valid data storage information indicates a storage status of valid data in the at least one first-type physical unit.

6. The memory management method according to claim 5 , wherein the step of obtaining the first event count according to the dispersion rate and the valid data storage information of the at least one first-type physical unit comprises:
obtaining the first event count according to the dispersion rate, the valid data storage information of the at least one first-type physical unit and a number of at least one second-type physical unit among the physical units,
wherein the at least one second-type physical unit does not store the valid data.

7. The memory management method according to claim 4 , wherein the step of obtaining the first event count according to the dispersion rate comprises:
obtaining a second event count according to the dispersion rate, wherein the second event count corresponds to a number of at least one accessing event for filling up a second-type physical unit among the physical units; and
obtaining the first event count according to the second event count.

8. A memory storage device, comprising:
a connection interface unit, configured to be coupled to a host system;
a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of physical units, at least one first-type physical unit among the physical units stores first data, and the first data corresponds to a plurality of logical units; and
a memory control circuit unit, coupled to the connection interface unit and the rewritable non-volatile memory module,
wherein the memory control circuit unit is configured to instruct to perform at least one data merge operation for at least one of the physical units according to a write command from the host system,
wherein the memory control circuit unit is further configured to adjust times of performing the at least one data merge operation according to a dispersion rate of the logical units corresponding to the first data.

9. The memory storage device according to claim 8 , wherein the dispersion rate of the logical units is positively correlated to a number of at least one table recording logical-to-physical mapping information of the first data.

10. The memory storage device according to claim 8 , wherein the operation of the memory control circuit unit performing the at least one data merge operation for the at least one of the physical units according to the write command from the host system comprises:
instructing to perform at least one accessing event for the at least one of the physical units according to the write command from the host system,
wherein the at least one accessing event comprises at least one of a data reading event, a data writing event and a table reading event.

11. The memory storage device according to claim 8 , wherein the operation of the memory control circuit unit adjusting the times of performing the at least one data merge operation according to the dispersion rate of the logical units corresponding to the first data comprises:
obtaining a first event count according to the dispersion rate; and
adjusting times of performing at least one accessing event corresponding to the write command according to the first event count.

12. The memory storage device according to claim 11 , wherein the operation of the memory control circuit unit obtaining the first event count according to the dispersion rate comprises:
obtaining the first event count according to the dispersion rate and valid data storage information of the at least one first-type physical unit,
wherein the valid data storage information indicates a storage status of valid data in the at least one first-type physical unit.

13. The memory storage device according to claim 12 , wherein the operation of the memory control circuit unit obtaining the first event count according to the dispersion rate and the valid data storage information of the at least one first-type physical unit comprises:
obtaining the first event count according to the dispersion rate, the valid data storage information of the at least one first-type physical unit and a number of at least one second-type physical unit among the physical units,
wherein the at least one second-type physical unit does not store the valid data.

14. The memory storage device according to claim 11 , wherein the operation of the memory control circuit unit obtaining the first event count according to the dispersion rate comprises:
obtaining a second event count according to the dispersion rate, wherein the second event count corresponds to a number of at least one accessing event for filling up a second-type physical unit among the physical units; and
obtaining the first event count according to the second event count.

15. A memory control circuit unit for controlling a rewritable non-volatile memory module, comprising:
a host interface configured to be coupled to a host system;
a memory interface configured to be coupled to the rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of physical units, at least one first-type physical unit among the physical units stores first data, and the first data corresponds to a plurality of logical units; and
a memory management circuit, coupled to the host interface and the memory interface,
wherein the memory management circuit is con

Assignees

• Phison Electronics Corp

Inventors

• Kuo Che-Yueh
• Li Wen-Jin

Classifications

• G06F11/1048

  using arrangements adapted for a specific error detection or correction feature · CPC title

• G06F3/0659 Primary

  Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

• G06F2212/7201

  Logical to physical mapping or translation of blocks or pages · CPC title

• G06F2212/1016

  Performance improvement · CPC title

• G06F2212/7205

  Cleaning, compaction, garbage collection, erase control · CPC title