Prioritizing tasks for copying to nonvolatile memory

US10545686B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10545686-B2
Application numberUS-201515748645-A
CountryUS
Kind codeB2
Filing dateJul 31, 2015
Priority dateJul 31, 2015
Publication dateJan 28, 2020
Grant dateJan 28, 2020

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  1. Title

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  2. Abstract

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  5. First independent claim

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  7. Citations and related patents

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Abstract

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A computing device having firmware, an uninterruptible power supply (UPS), and a memory module with volatile memory. Firmware tasks are prioritized to elevate tasks associated with the copying of the contents of the volatile memory to the nonvolatile memory external to the memory module during the loss of main or primary power.

First claim

Opening claim text (preview).

What is claimed is: 1. A computing device comprising: a processor; a memory module comprising volatile memory for random access memory (RAM); an uninterruptible power supply (UPS) to supply power to the computing device during loss of primary power; and firmware executed by the processor to copy contents of the volatile memory, during the loss of primary power, to a nonvolatile memory external to the memory module, wherein the tasks of the firmware are prioritized to elevate tasks associated with the copying of the contents of the volatile memory to the nonvolatile memory; wherein the tasks of the firmware that are prioritized are basic input/output system (BIOS) boot sequence tasks, and the elevated tasks are boot sequence tasks associated with the copying of the contents of the volatile memory to the nonvolatile memory. 2. The computing device of claim 1 , wherein the firmware comprises a basic input/output system (BIOS) stored in read-only memory (ROM). 3. The computing device of claim 1 , wherein the tasks of the firmware are prioritized to elevate tasks associated with the copying of the contents of the volatile memory to the nonvolatile memory, comprises to skip tasks not associated with or needed for the copying of the contents of the volatile memory to the nonvolatile memory. 4. The computing device of claim 3 , wherein the tasks to skip comprise to skip loading of Platform Early Initialization Modules and Driver Execution Environments (DXE) drivers not essential to loading of a Unified Extensible Firmware Interface (UEFI) driver managing the nonvolatile memory. 5. The computing device of claim 3 , wherein the tasks to skip comprise to skip Peripheral Component Interconnect Express (PCIe) enumeration for devices not associated with the copying of the contents from volatile memory to nonvolatile memory, and wherein the devices not associated with the copying of the contents comprise a network interface controller. 6. The computing device of claim 1 , wherein the tasks of the firmware are prioritized comprises to rely on multi-threading some tasks associated with the copying of the contents of the volatile memory to the nonvolatile memory. 7. The computing device of claim 1 , comprising a system memory controller to facilitate the copying of the contents from the volatile memory to the nonvolatile memory, wherein the system memory controller is external to the memory module; and a power supply unit (PSU), wherein the UPS is embedded in the PSU. 8. A method for a computing device, comprising: experiencing a loss of main power at the computing device, the computing device comprising a processor, firmware, an uninterruptible power supply (UPS), and a memory module having volatile memory; utilizing power from the UPS during the loss of main power; and copying, via the firmware, data from the volatile memory to nonvolatile memory external to the memory module during the loss of main power, wherein the tasks of the firmware are prioritized to elevate tasks associated with the copying of the data from the volatile memory to the nonvolatile memory; wherein the tasks of the firmware comprise basic input/output system (BIOS) boot sequence tasks. 9. The method of claim 8 , wherein the firmware comprises a basic input/output system (BIOS) stored in read-only memory (ROM). 10. The method of claim 8 , wherein the tasks of the firmware are prioritized to elevate tasks associated with the copying of the contents of the volatile memory to the nonvolatile memory, comprises to skip tasks not associated with or needed for the copying of the contents of the volatile memory to the nonvolatile memory. 11. The method of claim 10 , wherein the tasks to skip comprise to skip loading of Platform Early Initialization Modules and Driver Execution Environments (DXE) drivers not essential to loading of a Unified Extensible Firmware Interface (UEFI) driver managing the nonvolatile memory. 12. The method of claim 10 , wherein the tasks to skip comprise to skip Peripheral Component Interconnect Express (PCIe) enumeration for devices not associated with the copying of the contents from volatile memory to nonvolatile memory. 13. A tangible, non-transitory, computer-readable medium comprising instructions that direct a processor to: copy, via firmware of a computing device, data from volatile memory of a memory module of the computing device to nonvolatile memory external to the memory module during a loss of primary power to the computing device; and prioritize firmware tasks associated with the copying of the volatile memory to the nonvolatile memory over other firmware tasks; wherein the firmware tasks comprise basic input/output system (BIOS) boot sequence tasks.

Assignees

Inventors

Classifications

  • Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations (for resetting only G06F1/24) · CPC title

  • Migration mechanisms · CPC title

  • G06F9/4401Primary

    Bootstrapping (security arrangements therefor G06F21/57) · CPC title

  • Redundant power supplies (power supply failure G06F1/30) · CPC title

  • to service a request · CPC title

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Frequently asked questions

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What does patent US10545686B2 cover?
A computing device having firmware, an uninterruptible power supply (UPS), and a memory module with volatile memory. Firmware tasks are prioritized to elevate tasks associated with the copying of the contents of the volatile memory to the nonvolatile memory external to the memory module during the loss of main or primary power.
Who is the assignee on this patent?
Hewlett Packard Entpr Dev Lp
What technology area does this patent fall under?
Primary CPC classification G06F9/4401. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 28 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).