Metallic microstructures with reduced-visibility and methods for producing same

Patent metadata

Field	Value
Publication number	US-10537028-B2
Application number	US-201515320016-A
Country	US
Kind code	B2
Filing date	Jun 26, 2015
Priority date	Jun 30, 2014
Publication date	Jan 14, 2020
Grant date	Jan 14, 2020

Abstract

Electrically conductive patterns formed on a substrate are provided with a reduced visibility. A region of a major surface of the substrate is selectively roughened to form a roughened pattern on the major surface of the substrate. Electrically conductive traces are directly formed on the roughened region and are conformal with the roughened pattern on the major surface of the substrate.

First claim

What is claimed is:

1. A method of forming an electrically conductive pattern on a substrate, comprising:
forming a resist pattern on a resist layer on a major surface of the substrate, the resist pattern including a land region with a reduced thickness;
selectively roughening a region of the major surface of the substrate, via the resist pattern, to form at least one roughened pattern on the major surface of the substrate; and
forming one or more electrically conductive traces directly on the roughened region of the major surface of the substrate,
wherein the electrically conductive traces are in direct contact and conformal with the selectively roughened region of the major surface of the substrate.

2. The method of claim 1 , wherein forming the resist pattern is achieved with an embossing process that comprises coating the resist layer on the major surface of the substrate, and urging an embossing tool having a protruded feature into the resist layer to create the land region, the land region corresponding to the protruding feature of the embossing tool.

3. The method of claim 2 , further comprising reactive-ion etching the resist layer to remove the land region, form a lift-off mask, and selectively expose the region of the major surface of the substrate underlying the land region.

4. The method of claim 3 , wherein selectively roughening the region of the major surface of the substrate comprises continuing the etching to roughen the exposed region of the major surface of the substrate.

5. The method of claim 4 , wherein forming the electrically conductive traces comprises depositing at least one metal layer on the resist layer and the roughened region, and removing the lift-off mask along with a portion of the metal layer thereon from the substrate to reveal the electrically conductive pattern on the substrate.

6. The method of claim 2 , further comprising heating the resist layer when urging the embossing tool into the resist layer.

7. The method of claim 5 , wherein removing the lift-off mask comprises pressure-washing the resist layer.

8. A method of forming an electrically conductive pattern on a substrate with a reduced visibility, comprising:
providing a resist layer on a major surface of the substrate, the resist layer comprising a resist pattern including a land region, the land region having a reduced thickness;
etching the resist layer to remove the land region to form a lift-off mask and selectively expose a region of the major surface of the substrate underlying the land region;
continuing the etching to roughen the exposed region of the major surface of the substrate to form at least one roughened pattern on the major surface of the substrate;
depositing a metal layer on the resist layer to form a plurality of electrically conductive traces directly on the roughened region of the major surface of the substrate, the plurality of electrically conductive traces being positioned to form the electrically conductive pattern corresponding to the roughened pattern on the major surface of the substrate; and
removing the lift-off mask along with a portion of the metal layer thereon from the substrate to reveal the electrically conductive pattern on the substrate.

9. The method of claim 8 , wherein at least one of the electrically conductive traces has a bottom surface in direct contact with the roughened region of the major surface of the substrate, and a surface morphology of the bottom surface is conformal with the roughened region, such that the bottom surface of the electrically conductive traces is capable of scattering incident visible light to reduce a visibility of the electrically conductive pattern.

10. The method of claim 8 , wherein providing the resist layer comprises coating a resist layer on the major surface of the substrate, and thermally embossing, via an embossing tool having a protruding feature, into the resist layer to create the resist pattern, the land region corresponding to the protruding feature of the embossing tool.

11. A method of forming an electrically conductive pattern on a substrate, comprising:
forming a resist pattern on a resist layer on the major surface of the substrate, wherein forming the resist pattern is achieved with a microreplication process that comprises forming a land region on the resist layer with a reduced thickness, the resist layer being cured by radiation;
selectively roughening a region of the major surface of the substrate to form at least one roughened pattern on the major surface of the substrate, further comprising; and
forming one or more electrically conductive traces directly on the roughened region of the major surface of the substrate,
wherein the electrically conductive traces are in direct contact and conformal with the selectively roughened region of the major surface of the substrate, and
wherein the electrically conductive traces only contact the substrate on the roughened region, and the electrically conductive traces form the electrically conductive pattern in correspondence with the roughened pattern on the major surface of the substrate.

12. The method of claim 1 , wherein the electrically conductive traces only contact the substrate on the roughened region, and the electrically conductive traces form the electrically conductive pattern in correspondence with the roughened pattern on the major surface of the substrate.

13. The method of claim 8 , wherein the electrically conductive traces only contact the substrate on the roughened region.

Assignees

• 3M Innovative Properties Co

Inventors

• Stay Matthew S
• Smith Matthew R
• Pekurovsky Mikhail L
• Strand John T
• David Moses M
• Jerry Glen A
• Kawakami Ellison G
• Stensvad Karl K
• Starkey James R

Classifications

• H05K3/06

  the conductive material being removed chemically or electrolytically, e.g. by photo-etch process {(semi-additive methods H05K3/108)} · CPC title

• G06F2203/04103

  Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices · CPC title

• H05K2201/0108

  Transparent · CPC title

• H05K1/0274

  Optical details, e.g. printed circuits comprising integral optical means (H05K1/0269 takes precedence; coupling light guides with opto-electronic components G02B6/42) · CPC title

• H05K3/22

  Secondary treatment of printed circuits {(H05K3/1283 takes precedence; embedding circuits in grooves by pressure H05K3/107)} · CPC title