Storage system having an adaptive workload-based command processing clock

US10534546B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10534546-B2
Application numberUS-201715621480-A
CountryUS
Kind codeB2
Filing dateJun 13, 2017
Priority dateJun 13, 2017
Publication dateJan 14, 2020
Grant dateJan 14, 2020

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A storage system having an adaptive workload-based command processing clock is provided. In one embodiment, a storage system has a memory, a command processing path, and a controller in communication with the memory and the command processing path. The controller is configured to adapt an input clock signal based on a current workload of the controller and provide the adapted clock signal to the command processing path in the controller.

First claim

Opening claim text (preview).

What is claimed is: 1. A storage system, comprising: a memory; a command processing path; and a controller for communication with the memory and the command processing path, wherein the controller is configured to: adapt an input clock signal based on a workload of the controller, wherein when the workload of the controller increases, the controller is configured to adapt the input clock signal by decreasing a rate of the input clock signal; and provide the adapted input clock signal to the command processing path in the controller, wherein the workload is based on a size of one or more data packets associated with one or more commands, and wherein when the size of one or more data packets increases, the controller is configured to adapt the input clock signal by decreasing the rate of the input clock signal. 2. The storage system of claim 1 , wherein the controller comprises: a workload monitor counter; an outstanding command counter; and at least one divider configured to adapt the input clock signal by dividing the input clock signal by a quotient of a value of the workload monitor counter divided by a value of the outstanding command counter. 3. The storage system of claim 1 , wherein the command processing path comprises one or more of a command parser, a command executor, or a front-end processor. 4. The storage system of claim 1 , wherein the memory comprises a three-dimensional memory, and wherein the storage system is embedded in a host. 5. The storage system of claim 1 , wherein the storage system is removably connected to a host. 6. A method for using a storage system with an adaptive clock, the method comprising: performing the following in a storage system comprising a memory and a controller: calculating an average workload per command; modifying a clock signal based on the calculated average workload per command, wherein when the calculated average workload per command increases, a frequency of the clock signal is decreased; and providing the modified clock signal to at least one component in the controller, wherein the calculated average workload is based on a size of one or more data packets associated with one or more commands, and wherein when the size of one or more data packets increases, the frequency of the clock signal is decreased. 7. The method of claim 6 , wherein the average workload per command is calculated using a first counter that tracks data transfer sizes of pending commands, a second counter that tracks a number of pending commands, and a divider that divides a value of the first counter by a value of the second counter. 8. The method of claim 6 , wherein the clock signal is modified by dividing the clock signal by the calculated average workload per command. 9. The method of claim 6 , wherein the clock signal is modified using a workload-based clock generator in the controller. 10. The method of claim 6 , wherein the at least one component in the controller comprises a command processing component, and wherein the storage system comprises a solid state drive. 11. The method of claim 10 , wherein the solid state drive comprises an enterprise solid state drive. 12. A storage system, comprising: a memory; and means for generating, using a controller of the storage system, a variable clock signal based on a number of commands and a data transfer size associated with the commands and for providing the variable clock signal to a command processing component, wherein the means for generating, using the controller of the storage system, the variable clock signal comprises means for increasing a rate of the variable clock signal when a ratio of the data transfer size to the number of commands decreases, wherein the data transfer size associated with the commands is based on a size of one or more data packets associated with the commands, and wherein the means for generating, using the controller of the storage system, the variable clock signal comprises means for decreasing the rate of the variable clock signal when the size of one or more data packets increases. 13. The storage system of claim 12 , wherein the means for generating comprises at least one counter and at least one divider. 14. The storage system of claim 12 , wherein the command processing component comprises one or more of a command parser, a command executor, or a front-end processor. 15. The storage system of claim 12 , wherein the memory comprises a three- dimensional memory. 16. The storage system of claim 12 , wherein the storage system is embedded in a host. 17. The storage system of claim 12 , wherein the storage system is removably connected to a host. 18. The storage system of claim 12 , wherein the means for generating, using the controller of the storage system, the variable clock signal comprises means for decreasing the variable clock signal when a quotient of the data transfer size divided by the number of commands increases.

Assignees

Inventors

Classifications

  • Improving I/O performance · CPC title

  • Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

  • Power saving in storage systems · CPC title

  • Monitoring storage devices or systems · CPC title

  • G06F3/0613Primary

    in relation to throughput · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10534546B2 cover?
A storage system having an adaptive workload-based command processing clock is provided. In one embodiment, a storage system has a memory, a command processing path, and a controller in communication with the memory and the command processing path. The controller is configured to adapt an input clock signal based on a current workload of the controller and provide the adapted clock signal to th…
Who is the assignee on this patent?
Western Digital Tech Inc
What technology area does this patent fall under?
Primary CPC classification G06F3/0613. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 14 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).