Current mode switching regulator and operating method with offset circuitry to emulate a transient load step response

Patent metadata

Field	Value
Publication number	US-10534384-B2
Application number	US-201715585399-A
Country	US
Kind code	B2
Filing date	May 3, 2017
Priority date	Nov 16, 2012
Publication date	Jan 14, 2020
Grant date	Jan 14, 2020

Abstract

A current mode switching regulator circuit and operating method includes a variable duty cycle power switch controller, a voltage feedback loop that provides a feedback signal based on the output voltage, a current feedback loop that provides a current sense signal based on the output current, and an offset circuit having an external signal input and coupled to the current feedback loop. The power switch controller controls the switching regulator circuit to generate an output voltage and an output current. The offset circuit is configured to provide an offset output control signal, independently of the voltage feedback loop, to control the power switch controller so as to vary a duty cycle of the power switch controller based on the current sense signal and an external offset signal applied to the external signal input.

First claim

What is claimed is:

1. A current mode switching regulator circuit, comprising:
a variable duty cycle power switch controller configured to control the current mode switching regulator circuit to generate an output voltage and an output current from the current mode switching regulator circuit;
a voltage feedback loop that provides a feedback signal based on the output voltage;
a current feedback loop that provides a current sense signal based on the output current;
an offset circuit including:
a bus interface to provide an external offset signal adding a step offset to the current feedback loop, wherein the offset circuit is configured to vary a duty cycle of the variable duty cycle power switch controller in anticipation of a change in the feedback signal according to the current sense signal and the external offset signal; and
a load step detection circuit configured to determine a load step response, determine a target load step response using the bus interface, and compare the determined load step response to the target load step response; and
wherein the offset circuit is configured to adjust the external offset signal according to a difference between the determined load step response and the target load step response.

2. The current mode switching regulator circuit of claim 1 , wherein the offset circuit and the variable duty cycle power switch controller are configured to adjust the duty cycle in response to a change in the external offset signal to introduce the load step response in the output voltage, without detection of an additional load on the output voltage or a variation in the output current, the load step response being corrected by the variable duty cycle power switch controller based on the feedback signal upon a period of time after the load step response is introduced.

3. The current mode switching regulator circuit of claim 2 , including:
a comparator to compare the output voltage to the target load step response; and
wherein the bus interface is configured to provide the external offset signal based on one or more bus input signals provided to the bus interface and receive an output of the comparator.

4. The current mode switching regulator circuit of claim 3 , wherein the offset circuit further comprises: a summer circuit providing an offset output control signal; and a digital to analog converter (DAC) connected between the bus interface and the summer circuit and configured to provide the external offset signal based on one of a predetermined number of bit signatures received from the bus interface.

5. The current mode switching regulator circuit of claim 3 , wherein
the offset circuit is configured to adjust a magnitude or duration of the external offset signal based on the difference between the determined load step response and the target load step response.

6. The current mode switching regulator circuit of claim 2 , wherein the variable duty cycle power switch controller comprises a comparator, and wherein the offset circuit comprises a summer circuit, and a sense resistor in a current path of the output current, the sense resistor being coupled to a first input of the comparator and the summer circuit, the summer circuit providing an offset output control signal to a second input of the comparator, the comparator providing a duty cycle control signal that adjusts the duty cycle based on a first signal and the offset output control signal applied to the comparator.

7. The current mode switching regulator circuit of claim 2 , wherein the offset circuit and variable duty cycle power switch controller are configured to introduce the load step response at a magnitude proportional to the external offset signal.

8. The current mode switching regulator circuit of claim 2 , wherein the load step response is corrected by the variable duty cycle power switch controller, based on the feedback signal, at least 5 microseconds after the load step response is introduced.

9. The current mode switching regulator circuit of claim 2 , wherein the load step response is corrected by the variable duty cycle power switch controller, based on the feedback signal, two or more clock cycles of the power switch controller after the load step response is introduced.

10. The current mode switching regulator circuit of claim 1 , wherein the voltage feedback loop comprises an error amplifier, and wherein the load step detection circuit comprises:
a comparator coupled to the voltage feedback loop; and
a digital to analog converter (DAC) coupled between the comparator and the bus interface, wherein the DAC is configured to provide to the comparator an analog signal representative of a predetermined target peak response based on a bit signature received from the bus interface, and wherein the comparator is configured to compare the analog signal with the feedback signal, and the offset circuit is configured to adjust the external offset signal according to a comparison of a peak response of the feedback signal and the predetermined target peak response.

11. A variable duty cycle switching regulator circuit, comprising: means for controlling the switching regulator circuit to have a duty cycle to produce a corresponding output voltage and output current; means for producing a feedback signal based on the output voltage; means for producing a current sense signal to the switching regulator circuit based on the output current; means for generating an analog signal representative of a predetermined target peak response, the analog signal based on an external offset signal received as a bit signature; means for comparing the generated analog signal with the sensed feedback signal to detect the predetermined target peak response of the output voltage; and means for adjusting the external offset signal according to a difference between a peak response of the sensed feedback signal and the predetermined target peak response; and means for adjusting a duty cycle of the switching regulator circuit based on the current sense signal and the external offset signal in anticipation of a change in the feedback signal and any variation in the output current, the external offset signal adding a step offset to a current feedback loop and set independent of the output current.

12. The variable duty cycle switching regulator circuit of claim 11 , wherein the adjusting means adjusts the duty cycle in response to a change in the external offset signal to introduce a load step response in the output voltage, independently of detection of any additional load on the switching regulator circuit or a variation in the output current, and in which following a period of time after the load step response is introduced, the controlling means corrects the load step response based on the feedback signal.

13. The variable duty cycle switching regulator circuit of claim 12 , wherein the adjusting means adjusts the duty cycle to introduce the load step response at a magnitude proportional to the external offset signal.

14. The variable duty cycle switching regulator circuit of claim 12 , wherein the controlling means corrects the load step response based, on the feedback signal, at least 5 microseconds, or two or more clock cycles associated with the duty cycle, after the load step response is introduced.

15. The variable duty cycle switching regulator circuit of claim 12 , further comprising:
means for detecting a characteristic of the load step response in the output voltage.

16. The variable duty cycle switching regulator circuit of claim 15 , further comprising:
means for adjusting a magnitude or duration of the external offset s

Assignees

• Linear Tech Corp

Inventors

• Manlove Gregory
• Mckenzie James
• Chiacchia Robert
• Gu Yi Ding
• Li Jian

Classifications

• H02M3/156

  with automatic control of output voltage or current, e.g. switching regulators · CPC title

• G05F1/10 Primary

  Regulating voltage or current  (G05F1/02 takes precedence) · CPC title

• H02M3/158

  including plural semiconductor devices as final control devices for a single load · CPC title

• H02M3/142

  including plural semiconductor devices as final control devices for a single load · CPC title

• G05F1/562

  with a threshold detection shunting the control path of the final control device · CPC title