Communication connector for a communication system

Patent metadata

Field	Value
Publication number	US-10530100-B1
Application number	US-201816176177-A
Country	US
Kind code	B1
Filing date	Oct 31, 2018
Priority date	Oct 31, 2018
Publication date	Jan 7, 2020
Grant date	Jan 7, 2020

Abstract

A communication connector includes a wafer stack including ground wafers and signal wafers arranged in a stacked configuration. Each signal wafer includes a dielectric frame holding a signal leadframe including a plurality of signal contacts. Each ground wafer includes a dielectric frame holding a ground leadframe including ground plates connected by tie bars and rail slots therethrough. The communication connector includes ground rails separate from the ground wafers and being plugged into the wafer stack to electrically connect to corresponding ground wafers. The ground rails have rail tabs received in corresponding rail slots being coupled to ground plates of corresponding ground wafers. Each rail tab extends through at least one signal wafer to provide electrical shielding for signal contacts of the at least one signal wafer. Each rail tab is coupled to at least two different ground wafers to electrically connect the at least two different ground wafers.

First claim

What is claimed is:

1. A communication connector for a communication system, the communication connector comprising:
a wafer stack including ground wafers and signal wafers arranged in a stacked configuration;
each signal wafer including a dielectric frame holding a signal leadframe, the signal leadframe including a plurality of signal contacts;
each ground wafer including a dielectric frame holding a ground leadframe, the ground leadframe including ground plates connected by tie bars, the ground plates include rail slots therethrough; and
ground rails separate from the ground wafers and being plugged into the wafer stack to electrically connect to corresponding ground wafers, the ground rails having rail tabs passing through the dielectric frame and the signal leadframe of at least one signal wafer, the rail tabs received in corresponding rail slots and being coupled to ground plates of corresponding ground wafers, wherein each rail tab is coupled to at least two different ground wafers to electrically connect the at least two different ground wafers.

2. The communication connector of claim 1 , wherein each rail tab extends through at least one signal wafer to provide electrical shielding for signal contacts of the at least one signal wafer.

3. The communication connector of claim 1 , wherein the ground plates include protrusions extending into the rail slots to mechanically engage the corresponding rail tabs.

4. The communication connector of claim 1 , wherein the rail tabs are welded to the ground plates at multiple weld points to mechanically and electrically connect the rail tabs to the ground plates.

5. The communication connector of claim 1 , wherein the rail tabs engage the ground plates by an interference fit to mechanically and electrically connect the rail tabs to the ground plates.

6. The communication connector of claim 1 , wherein each ground plate includes multiple rail slots for electrically connecting to multiple ground rails.

7. The communication connector of claim 1 , wherein the dielectric frame of the ground wafer includes openings exposing the ground plates and the rail slots, the ground rails being received in corresponding openings.

8. The communication connector of claim 1 , wherein the dielectric frame of the signal wafer includes openings therethrough between signal contacts, the openings receiving the corresponding ground rails.

9. The communication connector of claim 1 , wherein the signal contacts are arranged in pairs, the signal contacts include mating ends, the mating ends opposing each other across pair gaps configured to receive a card edge of a circuit card for mating to opposing sides of the circuit card.

10. The communication connector of claim 9 , wherein the ground plates are arranged in pairs, the ground plates include mating ends, the mating ends opposing each other across pair gaps configured to receive the card edge of the circuit card for mating to opposing sides of the circuit card, the mating ends of the ground plates being aligned with the mating ends of the signal contacts.

11. The communication connector of claim 1 , wherein each ground rail includes tie bars connecting the rail tabs of the ground rails, the ground rails having gaps between the rail tabs, the rail tabs having edges facing each other across the gaps.

12. The communication connector of claim 11 , wherein the dielectric frame of the ground wafer includes pads located between ground rails and connecting strips extending between pads, the connecting strips passing through gaps between rail tabs.

13. The communication connector of claim 1 , wherein the ground wafers of the wafer stack include a first ground wafer and a second ground wafer and the signal wafers of the wafer stack include a first signal wafer and a second signal wafer, the first and second signal wafers being located between the first and second ground wafers.

14. The communication connector of claim 1 , wherein the ground rails and the ground wafers form ground silos bounded by corresponding rail tabs and corresponding ground plates, the signal contacts being arranged in pairs routed in corresponding ground silos, the ground rails and the ground wafers provide electrical shielding for the pairs of signal contacts in the ground silos.

15. A communication connector comprising:
a left grounded wafer stack having ground wafers and signal wafers arranged in a stacked configuration, each signal wafer of the left grounded wafer stack including a dielectric frame holding a signal leadframe including a plurality of signal contacts, each ground wafer of the left grounded wafer stack including a dielectric frame holding a ground leadframe including ground plates connected by tie bars and having rail slots therethrough, the left grounded wafer stack including ground rails separate from the ground wafers and being plugged into the left grounded wafer stack to electrically connect to corresponding ground wafers, the ground rails having rail tabs received in corresponding rail slots and being coupled to ground plates of corresponding ground wafers, wherein each rail tab extends through at least one signal wafer to provide electrical shielding for signal contacts of the at least one signal wafer, and wherein each rail tab is coupled to at least two different ground wafers to electrically connect the at least two different ground wafers;
a right grounded wafer stack having ground wafers and signal wafers arranged in a stacked configuration, each signal wafer of the right grounded wafer stack including a dielectric frame holding a signal leadframe including a plurality of signal contacts, each ground wafer of the right grounded wafer stack including a dielectric frame holding a ground leadframe including ground plates connected by tie bars and having rail slots therethrough, the right grounded wafer stack including ground rails separate from the ground wafers and being plugged into the right grounded wafer stack to electrically connect to corresponding ground wafers, the ground rails having rail tabs received in corresponding rail slots and being coupled to ground plates of corresponding ground wafers, wherein each rail tab extends through at least one signal wafer to provide electrical shielding for signal contacts of the at least one signal wafer, and wherein each rail tab is coupled to at least two different ground wafers to electrically connect the at least two different ground wafers; and
a center wafer stack having ground wafers and signal wafers arranged in a stacked configuration, each signal wafer including a dielectric frame holding a signal leadframe including a plurality of signal contacts, each ground wafer including a dielectric frame holding a ground leadframe including ground plates, the ground wafers of the center wafer stack being electrically isolated from each other;
wherein the center wafer stack is located between the left and right grounded wafer stacks.

16. The communication connector of claim 15 , wherein the signal contacts of the left grounded wafer stack and the signal contacts of the right grounded wafer stack are arranged in pairs conveying high speed data signals, the signal contacts of the center wafer stack convey low speed data signals.

17. The communication connector of claim 15 , wherein the signal contacts of the left grounded wafer stack, the right grounded wafer stack, and the center wafer stack include mating ends, the ground plates of the left grounded wafer stack, the right grounded wafer stack, and the center wafer stack include mating ends, the mating ends of the signal contacts and the

Assignees

• Te Connectivity Corp

Inventors

• Henry Randall Robert
• Phillips Michael John
• Champion Bruce Allen

Classifications

• H01R13/6596

  the conductive member being a metal grounding panel · CPC title

• H01R13/6587 Primary

  for mounting on PCBs · CPC title

• H01R12/73

  connecting to other rigid printed circuits or like structures · CPC title

• H01R13/6597

  the conductive member being a contact of the connector · CPC title

• H01R13/648 Primary

  Protective earth or shield arrangements on coupling devices {, e.g. anti-static shielding}   (coaxially arranged shields H01R24/38) · CPC title