Semiconductor device package including cover including tilted inner sidewall

Patent metadata

Field	Value
Publication number	US-10526200-B2
Application number	US-201715815432-A
Country	US
Kind code	B2
Filing date	Nov 16, 2017
Priority date	Oct 27, 2015
Publication date	Jan 7, 2020
Grant date	Jan 7, 2020

Abstract

A semiconductor device package includes: (1) a carrier; (2) a sensor element disposed on or within the carrier; and (3) a cover including a top surface, a bottom surface and an inner sidewall, the inner sidewall defining a penetrating hole extending from the top surface to the bottom surface, and the penetrating hole exposing the sensor element. The semiconductor device package is characterized such that (i) the inner sidewall is divided into an upper portion and a lower portion, the upper portion is substantially perpendicular to the top surface, and the lower portion is tilted; or (ii) the entire inner sidewall is tilted. The lower portion of the inner sidewall or the entire inner sidewall is tilted at an angle of between about 10° to less than about 90°, relative to the top surface.

First claim

What is claimed is:

1. A semiconductor device package, comprising:
a carrier;
a sensor element disposed on or within the carrier, wherein the sensor element includes a receiving area for receiving light; and
a cover comprising a top surface, a bottom surface and an inner sidewall, the inner sidewall defining a penetrating hole extending from the top surface to the bottom surface, and the penetrating hole exposing the sensor element, wherein the inner sidewall includes a tilted inner sidewall tilted relative to the top surface, a dimension of a lower portion of the penetrating hole adjacent to the sensor element is larger than a dimension of an upper portion of the penetrating hole distal to the sensor element, the dimension of the upper portion of the penetrating hole is larger than a dimension of the receiving area of the sensor element, and the receiving area of the sensor element does not overlap the cover in a vertical projection direction,
wherein the cover is a plastic cover and the inner sidewall of the cover is coated with a reflective metal coating.

2. The semiconductor device package according to claim 1 , wherein the tilted inner sidewall is tilted at an angle of between about 30° to about 60°,relative to the top surface.

3. The semiconductor device package according to claim 1 , wherein the tilted inner sidewall is tilted at an angle of between about 40° to about 50°, relative to the top surface.

4. The semiconductor device package according to claim 1 , further comprising a filter disposed on the cover and covering the penetrating hole.

5. The semiconductor device package according to claim 4 , wherein the cover further comprises a portion protruding from the top surface, and the protruding portion of the cover comprises an inner sidewall defining a space to accommodate the filter.

6. The semiconductor device package according to claim 5 , further comprising an adhesive filled in the space defined by the inner sidewall of the protruding portion of the cover.

7. The semiconductor device package according to claim 6 , wherein the adhesive comprises conductive fillers selected from carbon black, metal particles, metal-coated particles, or a combination thereof.

8. The semiconductor device package according to claim 5 , wherein the inner sidewall of the protruding portion is tilted.

9. The semiconductor device package according to claim 8 , wherein the inner sidewall of the protruding portion is tilted at an angle of between about 10° to less than about 90°, relative to the top surface.

10. The semiconductor device package according to claim 8 , wherein the inner sidewall of the protruding portion is tilted at an angle of between about 40° to about 50°, relative to the top surface.

11. The semiconductor device package according to claim 1 , wherein the tilted inner sidewall is tilted at an angle of between about 10° to about 90°, relative to the top surface.

12. The semiconductor device package according to claim 1 , wherein at least one of the bottom surface or the top surface of the cover are light reflection surfaces.

13. The semiconductor device package according to claim 12 , wherein the light reflection surfaces are coated with a reflective material.

14. The semiconductor device package according to claim 1 , wherein the inner sidewall of the cover further includes a vertical inner sidewall disposed between the top surface and the tilted inner sidewall, and the vertical inner sidewall is connected to the tilted inner sidewall.

15. A semiconductor device package, comprising:
a carrier;
a sensor element for receiving light disposed on the carrier or within the carrier;
a cover comprising a top surface, a bottom surface, an inner sidewall and a protruding portion, the inner sidewall defining a penetrating hole exposing the sensor element, wherein the protruding portion protrudes from the top surface, and the protruding portion includes an inner sidewall defining a space;
a filter disposed in the space and covering the penetrating hole; and
an adhesive disposed in the space, and configured to adhere the filter to the cover and configured to reduce parasitic light from entering the sensor element;
wherein at least a portion of the inner sidewall is tilted, relative to the top surface, and
wherein the cover is a plastic cover and the inner sidewall of the cover is coated with a reflective metal coating.

16. The semiconductor device package according to claim 15 , wherein the inner sidewall is divided into an upper portion and a lower portion, the upper portion is substantially perpendicular to the top surface, and the lower portion is tilted at an angle of between about 10° to less than about 90°, relative to the top surface.

17. The semiconductor device package according to claim 15 , wherein the inner sidewall of the protruding portion is tilted at an angle of between about 10° to less than about 90°, relative to the top surface.

18. A semiconductor device package, comprising:
a carrier;
a sensor element disposed on or within the carrier; and
a cover comprising a top surface, a bottom surface and an inner sidewall, the inner sidewall defining a penetrating hole extending from the top surface to the bottom surface, and the penetrating hole exposing the sensor element, wherein the inner sidewall consists of an upper portion and a lower portion connected to the upper portion, the upper portion is substantially perpendicular to the top surface, and the lower portion is tilted at an angle of between about 10° to less than about 90°, relative to the top surface,
wherein the cover is a plastic cover and the inner sidewall of the cover is coated with a reflective metal coating.

Assignees

• Advanced Semiconductor Eng

Inventors

• Huang Ching-Han
• Chan Hsun-Wei
• Tsai Yu-Hsuan

Classifications

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/753

  between laterally-adjacent chips · CPC title

• B81C2203/0109

  Bonding an individual cap on the substrate · CPC title

• B81C1/00317

  Packaging optical devices · CPC title

• B81B2201/0292

  Sensors not provided for in B81B2201/0207 - B81B2201/0285 · CPC title