Timer for creating a stable on time

Patent metadata

Field	Value
Publication number	US-10523116-B2
Application number	US-201816126705-A
Country	US
Kind code	B2
Filing date	Sep 10, 2018
Priority date	Mar 30, 2018
Publication date	Dec 31, 2019
Grant date	Dec 31, 2019

Abstract

A timer for creating a stable on time. The timer may have a reference voltage source, and an input voltage source. The voltage sources providing voltage that can be applied to a various circuit components such as capacitors, inductors, resistors, diodes, transistors, or other components. The reference voltage source may also be modified by a set of transistors coupled as a diode before being seen by an input of a timer comparator. The reference and input voltage source signals, which may be modified by circuit components, are compared by the timer comparator and then output as a timer control signal. The timer control signal may control a voltage converter, or the switches of a voltage converter.

First claim

We claim:

1. A timer, comprising:
a first comparator with a first input coupled to a first node to receive a first voltage, and a second input coupled to a second node to receive a second voltage of a boost converter having a boost mode and a down mode;
a voltage selection circuit coupled to an output of the first comparator and to the first node and the second node, wherein the voltage selection circuit is configured to select a higher one of the first voltage or the second voltage at a third node; and
a second comparator having a first input and a second input, the first input coupled to the third node, and the second input is selectively coupled to the second node.

2. The timer of claim 1 wherein the voltage selection circuit comprises:
a first switch coupled between the output of the first comparator and the first node; and
a second switch coupled between the second node and the output of the first comparator through an inverter.

3. The timer of claim 1 wherein the output of the voltage selection circuit is coupled to a current mirror.

4. The timer of claim 1 , the output of the voltage selection circuit coupled to a ramp resistor.

5. The timer of claim 3 , wherein the current mirror includes a first transistor and a second transistor.

6. The timer of claim 1 , the output of the second comparator includes a time on signal.

7. The timer of claim 1 , includes a load regulation controlled current source coupled to the second input of the second comparator.

8. The timer of claim 1 wherein the voltage selection circuit includes a down mode controlled current source coupled to the second input of the second comparator.

9. A system, comprising:
a boost converter; and
a timer coupled to the boost converter, the timer comprising:
a first comparator with a first input coupled to a first node to receive a first voltage, and a second input coupled to a second node to receive a second voltage of the boost converter;
a voltage selection circuit coupled to an output of the first comparator and to the first node and the second node, wherein the voltage selection circuit configured to select a higher one of the first voltage or the second voltage at a third node; and
a second comparator having a first input and a second input, the first input coupled to the third node, and the second input selectively coupled to the second node.

10. The system of claim 9 , wherein the boost converter having a boost mode and a down mode.

11. The system of claim 9 , wherein the transistor is a PMOS transistor coupled in a diode configuration that allows for a voltage drop during a down mode of the boost converter between the second node and the second input of the second comparator.

12. The system of claim 9 , includes a load regulation controlled current source coupled to the second input of the second comparator.

13. The system of claim 9 , includes a down mode controlled current source coupled to the second input of the second comparator.

Assignees

• Texas Instruments Inc

Inventors

• Dietrich Stefan
• Kirchner Joerg
• Ganz Ruediger

Classifications

• G06F1/04

  Generating or distributing clock signals or signals derived directly therefrom · CPC title

• H02M3/158 Primary

  including plural semiconductor devices as final control devices for a single load · CPC title

• H02M3/137 Primary

  with automatic control of output voltage or current, e.g. switching regulators · CPC title

• H02M3/1582

  Buck-boost converters (H02M3/1584 takes precedence) · CPC title

• H02M1/0003

  Details of control, feedback or regulation circuits · CPC title