Organic light emitting display device

Patent metadata

Field	Value
Publication number	US-10522780-B2
Application number	US-201715787629-A
Country	US
Kind code	B2
Filing date	Oct 18, 2017
Priority date	Oct 19, 2016
Publication date	Dec 31, 2019
Grant date	Dec 31, 2019

Abstract

An OLED device includes a substrate, a semiconductor element on the substrate and including an active layer, a first gate electrode on the active layer, a second gate electrode on the first gate electrode, and source and drain electrodes, a wiring connection structure electrically connected to the semiconductor element and including an active layer pattern spaced from the active layer and corresponding to a first region, a second region, a third region between the first region and the second region, and a fourth region, a first gate electrode pattern overlapping the active layer pattern and expose active pattern layer at the first region and the second region, and a second gate electrode pattern contacting a portion of the first gate electrode pattern in the third region, and contacting the active layer pattern in the first region, and a sub-pixel structure on the semiconductor element and the wiring connection structure.

First claim

What is claimed is:

1. An organic light emitting display (OLED) device, comprising:
a substrate;
a semiconductor element on the substrate, the semiconductor element comprising:
an active layer;
a first gate electrode on the active layer;
a second gate electrode on the first gate electrode such that the first gate electrode is between the active layer and the second gate electrode; and
source and drain electrodes above the second gate electrode;

a wiring connection structure electrically connected to the semiconductor element, the wiring connection structure comprising:
an active layer pattern spaced from the active layer on the substrate, the active layer pattern corresponding to a first region, a second region spaced from the first region, a third region between the first region and the second region, and a fourth region;
a first gate electrode pattern overlapping the active layer pattern to expose the active layer pattern at the first region, and defining an opening that exposes the active layer pattern at the second region; and
a second gate electrode pattern simultaneously contacting both upper and side surfaces of the first gate electrode pattern in the third region and the active layer pattern in the first region, and

a sub-pixel structure on the semiconductor element and the wiring connection structure,
wherein the first gate electrode pattern is between the active layer pattern and the second gate electrode pattern.

2. The OLED device of claim 1 , wherein the semiconductor element further comprises:
a gate insulation layer on the substrate, the active layer, and the active layer pattern, and exposing the first region; and
a first insulating interlayer on the gate insulation layer, the first gate electrode, and the first gate electrode pattern, and defining a contact hole overlapping the first region and the third region.

3. The OLED device of claim 2 , wherein the first insulating interlayer contacts the gate insulation layer in the second region via the opening of the first gate electrode pattern.

4. The OLED device of claim 2 , wherein the second gate electrode pattern contacts the first gate electrode pattern in the third region via the contact hole of the first insulating interlayer, and contacts the active layer pattern in the first region.

5. The OLED device of claim 2 , wherein the first insulating interlayer covers the first gate electrode pattern in the fourth region.

6. The OLED device of claim 1 , wherein the second gate electrode pattern extends in a direction from the first region into the fourth region, and fills the opening of the first gate electrode pattern, and
wherein the second gate electrode pattern contacts the first gate electrode pattern in the third region and in the fourth region, and is connected to the active layer pattern in the second region.

7. The OLED device of claim 6 , wherein the first region comprises a first heavily doped region and a first lightly doped region that is adjacent the third region, and
wherein the second region comprises a second lightly doped region that is adjacent the first lightly doped region, a third lightly doped region that is spaced from the second lightly doped region, and a second heavily doped region that is between the second lightly doped region and the third lightly doped region.

8. The OLED device of claim 7 , wherein the semiconductor element further comprises:
a gate insulation layer on the substrate, the active layer, and the active layer pattern, and exposing the active layer pattern at the first region and the second region; and
a first insulating interlayer on the gate insulation layer, the first gate electrode, and the first gate electrode pattern, and defining a contact hole overlapping the first, second, third, and fourth regions.

9. The OLED device of claim 8 , wherein the first insulating interlayer exposes a portion of the first gate electrode pattern at the fourth region.

10. The OLED device of claim 8 , wherein the second gate electrode pattern contacts the first gate electrode pattern at the third region via the contact hole of the first insulating interlayer, and is connected to the active layer pattern at the first region and the second region.

11. The OLED device of claim 10 , wherein the second gate electrode pattern is connected to the first heavily doped region, the first lightly doped region, the second lightly doped region, the second heavily doped region, and the third lightly doped region.

12. The OLED device of claim 7 , wherein the semiconductor element further comprises:
a gate insulation layer on the substrate, the active layer, and the active layer pattern, and exposing the first region and a portion of the second region; and
a first insulating interlayer on the gate insulation layer, the first gate electrode, and the first gate electrode pattern, and defining a contact hole overlapping the first region, the third region, and a portion of the second region.

13. The OLED device of claim 12 , wherein the gate insulation layer and the first insulating interlayer are located above the third lightly doped region.

14. The OLED device of claim 12 , wherein the second gate electrode pattern contacts the first gate electrode pattern at the third region via the contact hole of the first insulating interlayer, and is connected to the first heavily doped region, the first lightly doped region, the second lightly doped region, and the second heavily doped region.

15. The OLED device of claim 12 , wherein the first insulating interlayer covers the first gate electrode pattern at the fourth region.

16. The OLED device of claim 1 , wherein the semiconductor element further comprises a second insulating interlayer on the second gate electrode and the second gate electrode pattern.

17. The OLED device of claim 1 , wherein the active layer pattern is configured to receive a gate signal,
wherein the first gate electrode pattern is configured to receive the gate signal through the second gate electrode pattern, and
wherein the first gate electrode is configured to receive the gate signal through the first gate electrode pattern.

18. The OLED device of claim 1 , wherein the sub-pixel structure comprises:
a lower electrode on the semiconductor element;
a light emitting layer on the lower electrode; and
an upper electrode on the light emitting layer.

19. The OLED device of claim 1 , wherein an opening of the first gate electrode pattern has a first width extending a first direction, and a second width extending a second direction that is perpendicular to the first direction,
wherein the first width is greater than 0.2 micrometers, and
wherein the second width is greater than 0.5 micrometers.

20. The OLED device of claim 1 , wherein the active layer and the active layer pattern comprise a same material,
wherein the first gate electrode and the first gate electrode pattern comprises a same material, and wherein the second gate electrode and the second gate electrode pattern comprise a same material.

Assignees

• Samsung Display Co Ltd

Inventors

• Ahn Kiwan
• Yoon Joosun

Classifications

• H01L27/3262

  Electricity · mapped topic

• H01L27/322

  Electricity · mapped topic

• H01L27/3276

  Electricity · mapped topic

• H01L51/5203 Primary

  Electricity · mapped topic

• H01L2227/323

  Electricity · mapped topic