Secured comparative processing method

Patent metadata

Field	Value
Publication number	US-10521586-B2
Application number	US-201415107879-A
Country	US
Kind code	B2
Filing date	Dec 23, 2014
Priority date	Dec 24, 2013
Publication date	Dec 31, 2019
Grant date	Dec 31, 2019

Abstract

The invention relates to a secured comparative processing method of the type in which a processor of an electronic component compares a set of proof data received by the processor as an input with main secret data stored in said electronic component, characterised in that the processor executes, in parallel with the comparison with the secret data, a series of complementary operations on the set of proof data which generate on the electronic component a variation in behaviour which is a function of the proof data which the component receives as an input and which is added to the variation in behaviour linked to the comparison with the main secret data, the series of complementary operations including a series of base operations repeated K times, and the execution of said series being preceded by an adjustment of execution parameters of said series, the parameters including: the identifier of the series of base operations to be executed, the series of base operations being comprised within a set of predefined base operations, and the number K of executions of the set of base operations, the set of adjusted execution parameters being specific to the set of proof data received by the electronic component.

First claim

The invention claimed is:

1. A secure comparative processing method of the type in which a processor of an electronic component compares test data received by the electronic component to secret data stored in said electronic component, wherein the processor executes in parallel to said comparison, a series of complementary operations on the test data, which series of complementary operations produce a variation of physical or material properties of the electrical component, wherein said variation is a function of the test data and is added to a variation in behavior of physical or material properties of the electrical component linked to said comparison, the executed series of complementary operations comprising a sequence of basic operations repeated K times, and the execution of said series being preceded by adjustment of a tuple of execution parameters of said series according to the test data, the tuple of execution parameters comprising:
an identifier of the sequence of basic operations, the sequence of basic operations being contained in a set of predefined basic operations,
wherein there is a one-to-one correspondence between each value of the tuple of execution parameters and each value of the test data received by the electronic component, said one-to-one correspondence used to make the electronic component more resistant to side channel attacks.

2. The method according to claim 1 , wherein the tuple of execution parameters also comprises a wait period between two successive executions of the basic operation.

3. The method according to claim 2 , wherein the test data comprises M values, and the tuple of execution parameters is a N-tuple, wherein N<M, each execution parameter being calculated as an image, by a respective injective function, of one or more values associated with said execution parameter among the M values.

4. The method according to claim 3 , wherein the M values are first, second, third and fourth integer values each between 0 and L, wherein N=3, and:
a first of the execution parameters is equal to
aP1+bP2,

where a and b are two first integer coefficients one of which at least is greater than L+1 such that a and b are prime to one another,
a second of the execution parameters is equal to the third value multiplied by a second predetermined coefficient, and
the third of the execution parameters is equal to the fourth value multiplied by a third predetermined coefficient.

5. The method according to claim 4 , wherein at least one of the coefficients varies with each new test data received by the electronic component.

6. The method according to claim 5 , wherein each variable coefficient is selected by circular reading of an associated table of coefficients and stored in the electronic component, the tables being of different lengths.

7. An authentication method wherein a comparative processing method according to claim 1 is performed, the received test data being codes to be authenticated.

8. An electronic authentication component comprising a memory in which main control secret data are stored, and a processor, the electronic component being characterized in that the processor is programmed to execute the method according to claim 1 .

9. A secure comparative processing method performed by a processor of an electronic component, wherein the method comprises:
receiving test data,
adjusting a tuple of execution parameters according to the test data, the tuple of execution parameters comprising a number K and an identifier of a sequence of basic operations contained in a set of predefined basic operations, wherein there is a one-to-one correspondence between each value of the adjusted tuple of execution parameters and each value of the test data,
comparing the test data to secret data stored in said electronic component, to cause a first variation of physical or material properties of the electrical component,
in parallel to said comparing, executing K times a sequence of basic operation having said identifier, to cause a second variation of physical or material properties of the electrical component which is added to said first variation and depends on the test data, said one-to-one correspondence used to make the electronic component more resistant to side channel attacks.

Assignees

• Morpho
• Idemia Identity & Security

Inventors

• Berthier Mael
• Servant Victor

Classifications

• G06F2221/034

  Test or assess a computer or a system · CPC title

• G06F21/44

  Program or device authentication · CPC title

• H04L9/003 Primary

  for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA] · CPC title

• G06F21/755 Primary

  with measures against power attack · CPC title

• G06F21/552

  involving long-term monitoring or reporting · CPC title