User interface to implement topology integrity throughout routing implementations

US10521097B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-10521097-B1
Application numberUS-201715721648-A
CountryUS
Kind codeB1
Filing dateSep 29, 2017
Priority dateSep 29, 2017
Publication dateDec 31, 2019
Grant dateDec 31, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Described herein is an improved approach to implement routing for electrical designs. A structural routing solution is provided, where a routing system is implemented to generate a complete routing tree. A user interface is provided that captures users' design intent about topology of an electrical design, and the routing system adheres to that user's design intent about the topology throughout a layout process for the electrical design.

First claim

Opening claim text (preview).

What is claimed is: 1. A method implemented with a processor to generate a user interface for implementing an electronic design, the method comprising: implementing a first portion of a user interface having controls to configure constraints for a topology of an electronic design, wherein a reference topology is determined for the electronic design that conforms to the constraints, the reference topology having a trunk structure and one or more pins connected with the trunk structure through one or more twig structures; implementing a second portion of the user interface to display the reference topology, wherein the second portion of the user interface changes a displayed version of the reference topology as the controls in the first portion of the user interface is modified to change the constraints; and generating or updating a physical implementation of the electronic design at least by resolving a congesting issue in the electronic design to comply with one or more design rules, resolving the congesting issue comprising modifying a tree structure that represents a plurality of nets in the electronic design. 2. The method of claim 1 , wherein the controls in the first portion of the user interface comprises control elements to control one or more of trunk orientation, maximum trunk length, minimum trunk length, trunk orientation, maximum twig length, or maximum number of pins per trunk. 3. The method of claim 1 , wherein the controls in the first portion of the user interface includes a first set of control elements to configure a first set of trunk constraints corresponding to a first level of trunks and a second set of control elements to configure a second set of trunk constraints corresponding to a second level of trunks. 4. The method of claim 1 , wherein the tree structure comprises a first set of nodes for a first level of trunks, a second set of nodes for a second level of trunks, and a third set of nodes for pins in the electronic design. 5. The method of claim 1 , wherein generating or updating the physical implementation is performed for the electronic design at least by generating a forest of trees for the plurality of nets in the electronic design, adjusting the tree structure to resolve a plurality of congestion issues; performing realization of the physical implementation for the electronic design, and reviewing results for the physical implementation to determine compliance with a plurality of design rules. 6. The method of claim 1 , wherein the user interface further comprises a display having a reference display portion and a physical implementation display portion, the reference display portion displays a first image of the reference topology, and the physical implementation display portion displays a second image of the physical implementation of the electronic design. 7. The method of claim 6 , wherein the reference display portion and the physical implementation display portion are simultaneously displayed in the user interface. 8. A computer program product embodied on a non-transitory computer readable medium having stored thereon a sequence of instructions which, when executed by a processor, causes the processor to execute a set of acts to generate a user interface for implementing an electronic design, the set of acts comprising: implementing a first portion of a user interface having controls to configure constraints for a topology of an electronic design, wherein a reference topology is determined for the electronic design that conform to the constraints, the reference topology having a trunk structure and one or more pins connected with the trunk structure through one or more twig structures; implementing a second portion of the user interface to display the reference topology, wherein the second portion of the user interface changes a displayed version of the reference topology as the controls in the first portion of the user interface is modified to change the constraints; and generating or updating a physical implementation of the electronic design at least by resolving a congesting issue in the electronic design to comply with one or more design rules, resolving the congesting issue comprising modifying a tree structure that represents a plurality of nets in the electronic design. 9. The computer program product of claim 8 , wherein the controls in the first portion of the user interface comprises control elements to control one or more of trunk orientation, maximum trunk length, minimum trunk length, trunk orientation, maximum twig length, or maximum number of pins per trunk. 10. The computer program product of claim 8 , wherein the controls in the first portion of the user interface includes a first set of control elements to configure a first set of trunk constraints corresponding to a first level of trunks and a second set of control elements to configure a second set of trunk constraints corresponding to a second level of trunks. 11. The computer program product of claim 8 , wherein the tree structure comprises a first set of nodes for a first level of trunks, a second set of nodes for a second level of trunks, and a third set of nodes for pins in the electronic design. 12. The computer program product of claim 8 , wherein generating or updating the physical implementation is performed for the electronic design at least by generating a forest of trees for the plurality of nets in the electronic design, adjusting the tree structure to resolve a plurality of congestion issues; performing realization of the physical implementation for the electronic design, and reviewing results for the physical implementation to determine compliance with a plurality of design rules. 13. The computer program product of claim 8 , wherein the user interface further comprises a display having a reference display portion and a physical implementation display portion, the reference display portion displays a first image of the reference topology, and the physical implementation display portion displays a second image of a physical implementation of the electronic design. 14. The computer program product of claim 13 , wherein the reference display portion and the physical implementation display portion are simultaneously displayed in the user interface. 15. A system to generate a user interface for implementing an electronic design, the system comprising: a processor; and a memory for holding programmable code, wherein the programmable code includes instructions which, when executed by the processor, cause the processor to implement a first portion of a user interface having controls to configure constraints for a topology of an electronic design, wherein a reference topology is determined for the electronic design that conforms to the constraints, the reference topology having a trunk structure and one or more pins connected with the trunk structure through one or more twig structures; implement a second portion of the user interface to display the reference topology, wherein the second portion of the user interface changes a displayed version of the reference topology as the controls in the first portion of the user interface is modified to change the constraints; and generate or update a physical implementation of the electronic design at least by resolving a congesting issue in the electronic design to comply with one or more design rules, resolving the congesting issue comprising modifying a tree structure that represents a plurality of nets in the electronic design. 16. The system of claim 15 , wherein the controls in the first portion of the user interface comp

Assignees

Inventors

Classifications

  • Manufacture or treatment · CPC title

  • Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36) · CPC title

  • Routing (G06F30/396 takes precedence) · CPC title

  • Identifying congestion · CPC title

  • Selection of displayed objects or displayed text elements (G06F3/0482 takes precedence) · CPC title

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What does patent US10521097B1 cover?
Described herein is an improved approach to implement routing for electrical designs. A structural routing solution is provided, where a routing system is implemented to generate a complete routing tree. A user interface is provided that captures users' design intent about topology of an electrical design, and the routing system adheres to that user's design intent about the topology throughout…
Who is the assignee on this patent?
Cadence Design Systems Inc
What technology area does this patent fall under?
Primary CPC classification G06F3/04847. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 31 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).