Integrated circuit for sequence reporting and sequence generation

Patent metadata

Field	Value
Publication number	US-10517090-B2
Application number	US-201715645803-A
Country	US
Kind code	B2
Filing date	Jul 10, 2017
Priority date	Mar 19, 2007
Publication date	Dec 24, 2019
Grant date	Dec 24, 2019

Abstract

Disclosed are a sequence report method and a sequence report device for reducing a signaling amount for reporting a Zadoff-Chu sequence or a GCL sequence allocated for a cell. Indexes starting at 1 are correlated to different ZC sequences and are allocated for cells so that the indexes are continuous. When such ZC sequences are reported from BS to UE, a start index indicating the start of the continuous indexes is combined with the number of allocated sequences and they are reported as allocation sequence information by a report channel. The UE and the BS share the correlation between the ZC sequences and the indexes and the UE identifies a usable sequence number according to the correlation and the allocation sequence information reported from the BS.

First claim

The invention claimed is:

1. A non-transitory computer-readable medium having contents which cause communication circuitry to perform a method of selecting a preamble sequence, the method comprising:
extracting allocated-sequence information from a received signal, the allocated-sequence information indicating an allocation of at least two consecutive sequences of an arrangement of a plurality of sequences, each of the plurality of sequences having a difference between a position of a correlation value that occurs at a wrong timing and a position of a correlation value that occurs at a correct timing, the plurality of sequences being arranged in accordance with the differences and the arrangement including:
a first subset of the plurality of sequences arranged such that the differences generally increase in the arrangement of the first subset; and
a second subset of the plurality of sequences arranged such that the differences generally decrease in the arrangement of the second subset; and

selecting a preamble sequence based on the extracted allocated-sequence information.

2. The non-transitory computer-readable medium of claim 1 wherein the differences for the first subset of the plurality of sequences and the differences for the second subset of the plurality of sequences are close to a specific value near a middle of the arrangement of the plurality of sequences.

3. The non-transitory computer-readable medium of claim 2 wherein the sequences having the differences between the position of the correlation value that occurs at the wrong timing and the position of the correlation value that occurs at the correct timing which are farthest away from the specific value are arranged at ends of the arrangement of the plurality of sequences.

4. The non-transitory computer-readable medium of claim 1 wherein the allocated-sequence information comprises an amount of a cyclic shift.

5. An integrated circuit including circuitry which, in operation, controls a process, the process comprising:
extracting allocated-sequence information from a received signal, the allocated-sequence information indicating an allocation of at least two consecutive sequences of an arrangement of a plurality of sequences, each of the plurality of sequences having a difference between a position of a correlation value that occurs at a wrong timing and a position of a correlation value that occurs at a correct timing, the plurality of sequences being arranged in accordance with the differences and the arrangement including:
a first subset of the plurality of sequences arranged such that the differences generally increase in the arrangement of the first subset; and
a second subset of the plurality of sequences arranged such that the differences generally decrease in the arrangement of the second subset; and

selecting a preamble sequence based on the extracted allocated-sequence information.

6. The integrated circuit of claim 5 , comprising:
one or more inputs coupled to the circuitry, wherein at least one of the one or more inputs, in operation, receives the received signal.

7. The integrated circuit of claim 6 wherein the at least one of the one or more inputs, in operation, couples to an antenna system.

8. The integrated circuit of claim 5 wherein the differences for the first subset of the plurality of sequences and the differences for the second subset of the plurality of sequences are close to a specific value near a middle of the arrangement of the plurality of sequences.

9. The integrated circuit of claim 8 wherein the sequences having the differences between the position of the correlation value that occurs at the wrong timing and the position of the correlation value that occurs at the correct timing which are farthest away from the specific value are arranged at ends of the arrangement of the plurality of sequences.

10. The integrated circuit of claim 5 wherein the allocated-sequence information comprises an amount of a cyclic shift.

11. The integrated circuit of claim 5 , comprising:
one or more outputs coupled to the circuitry, wherein the process comprises generating one or more signals based on the selected preamble sequence and at least one of the one or more outputs, in operation, outputs the one or more generated signals.

Assignees

• Godo Kaisha Ip Bridge 1

Inventors

• Imamura Daichi
• Iwai Takashi
• Inogai Kazunori
• Futagi Sadaki
• Matsumoto Atsushi

Classifications

• H04W72/21

  in the uplink direction of a wireless link, i.e. towards the network · CPC title

• H04W72/23

  in the downlink direction of a wireless link, i.e. towards a terminal · CPC title

• H04W72/30

  Resource management for broadcast services · CPC title

• H04J13/0066

  GCL [generalized chirp-like] sequences · CPC title

• H04J13/0062 Primary

  Zadoff-Chu · CPC title