Bistable display and driving method thereof

Patent metadata

Field	Value
Publication number	US-10515575-B2
Application number	US-201815952760-A
Country	US
Kind code	B2
Filing date	Apr 13, 2018
Priority date	Apr 14, 2017
Publication date	Dec 24, 2019
Grant date	Dec 24, 2019

Abstract

A bistable display includes: an inner box constituted of a first substrate, a second substrate and a box body surrounding a space between the first substrate and the second substrate, a bistable display material is injected into the space, and one or more of a common electrode conductive layer, a pattern conductive layer, and a background conductive layer are respectively formed on the first substrate and/or the second substrate inside the inner box, and the common electrode conductive layer is led out of the inner box through a common electrode, the pattern conductive layer is led out of the inner box through a pattern electrode, and the background conductive layer is led out of the inner box through a background electrode.

First claim

What is claimed is:

1. A bistable display, comprising:
an inner box constituted of a first substrate, a second substrate and a box body surrounding a space between the first substrate and the second substrate, wherein
a bistable display material is injected into the space, and one or more of a common electrode conductive layer, a pattern conductive layer, and a background conductive layer are respectively formed on the first substrate and/or the second substrate inside the inner box,
the common electrode conductive layer is led out of the inner box through a common electrode, the pattern conductive layer is led out of the inner box through a pattern electrode, and the background conductive layer is led out of the inner box through a background electrode,
a common electrode terminal connected with the common electrode; and
a signal electrode terminal connected with the background electrode and/or the patter electrode, wherein
a driving signal including a pulse of a first voltage higher than a first stable state drive voltage of the display and a pulse of a second voltage lower than the first stable state drive voltage of the display and higher than a second stable state drive voltage of the display is applied between the common electrode terminal and the signal electrode terminal,
the background electrode, the pattern electrode and the common electrode are connected in series between the signal electrode terminal and the common electrode terminal through a voltage dividing component to form a voltage divider circuit,
the voltage dividing component is comprised of one or more of an external capacitor, an internal capacitor, a resistor, and a voltage regulator tube,
when a driving signal is applied between the common electrode terminal and the signal electrode terminal, the driving signal is directly applied to one of the background electrode and the pattern electrode, and the driving signal of a first divided voltage obtained after the voltage division by the voltage divider circuit is applied to the other one of the background electrode and the pattern electrode,
the value of the voltage dividing component in the voltage divider circuit and/or values of the first voltage and the second voltage are adjusted so that the first divided voltage applied to the other one of the background electrode and the pattern electrode is lower than the first stable state drive voltage of the display and higher than the second stable state drive voltage of the display when the driving signal is the pulse of the first voltage, and the first divided voltage applied to the other one of the background electrode and the pattern electrode is also lower than the first stable state drive voltage of the display and higher than the second stable state drive voltage of the display when the driving signal is the pulse of the second voltage.

2. The bistable display according to claim 1 , wherein
the common electrode conductive layer is formed on the glass of the first substrate, and the pattern conductive layer and the background conductive layer are formed on the glass of the second substrate,
the voltage divider circuit is formed by connecting a voltage divider capacitor connected between the background electrode and the pattern electrode and a plate capacitor formed between the pattern electrode and the common electrode in series,
the signal electrode terminal is directly connected with the background electrode and provides the voltage of the driving signal to the background electrode; and the signal electrode terminal is indirectly connected with the pattern electrode through the voltage divider capacitor and provides the first divided voltage to the pattern electrode.

3. The bistable display according to claim 1 , wherein
the pattern conductive layer is formed on the glass of the first substrate so that a part of the area of the pattern conductive layer overlaps with the background conductive layer formed on the glass of the second substrate in an up-down manner constituting a first equivalent capacitor, the remaining part of the area of the pattern conductive layer overlaps with the common electrode conductive layer formed on the glass of the second substrate in an up-down manner constituting a second equivalent capacitor, and the common electrode conductive layer on the glass of the second substrate and the common electrode conductive layer on the glass of the first substrate realize the up-down conduction through the conductive adhesive on the frame of the inner box of the display and are both connected with the common electrode,
the voltage divider circuit is formed by connecting the first equivalent capacitor between the background conductive layer and the pattern conductive layer and the second equivalent capacitor between the pattern conductive layer and the common conductive layer in series.

4. The bistable display according to claim 1 , wherein
the common electrode conductive layer is formed on the glass of the first substrate, and the pattern conductive layer and the background conductive layer are formed on the glass of the second substrate,
the voltage divider circuit is formed by connecting a first resistor bridged between the background electrode and the pattern electrode and a second resistor bridged between the pattern electrode and the common electrode in series.

5. The bistable display according to claim 1 , wherein
the common electrode conductive layer is formed on the glass of the first substrate, and the pattern conductive layer and the background conductive layer are formed on the glass of the second substrate,
the voltage divider circuit is formed by connecting a third resistor bridged between the background electrode and the pattern electrode and a voltage regulator tube bridged between the pattern electrode and the common electrode in series.

6. The bistable display according to claim 1 , wherein
a first pattern conductive layer and a second pattern conductive layer are formed on the glass of the second substrate, the first pattern conductive layer being connected with a first pattern electrode and the second pattern conductive layer being connected with a second pattern electrode,
the voltage divider circuit is formed by connecting a first external capacitor bridged between the first pattern electrode and the second pattern electrode, a second external capacitor bridged between the second pattern electrode and the background electrode, and a plate capacitor formed between the background electrode and the common electrode in series,
the signal electrode terminal is directly connected with the first pattern electrode, and provides the voltage of the driving signal to the first pattern electrode; and the first divided voltage obtained after dividing the voltage of the driving signal by the first external capacitor is provided to the second pattern electrode, and the second divided voltage obtained after dividing the voltage of the driving signal by the first external capacitor and the second external capacitor is provided to the background electrode,
the values of the first external capacitor and the second external capacitor in the voltage divider circuit are adjusted while dividing the voltage amplitude of the driving signal into 3 levels or more, and in a case that the voltage amplitude is of 3 levels, they are set as a first voltage, a third voltage and a second voltage respectively in the descending order with the third voltage being less than the first voltage and greater than the first stable state drive voltage of the display, so that it becomes one of the following three cases:
when the driving signal is the pulse of the first voltage, the first voltage is directly applied to the first pattern electrode, the voltage applied to the second pattern electrode is lower than the fir

Assignees

• Schneider Electric Ind Sas

Inventors

• Fei Weihe
• Zhang Fenglian
• Moliton Vivien
• Raulin Pierre

Classifications

• G02F1/01 Primary

  for the control of the intensity, phase, polarisation or colour  (G02F1/29, G02F1/35 take precedence) · CPC title

• G09G3/3433

  using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices (using liquid crystal devices G09G3/36; using electrochromic devices G09G3/38) · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G09G3/18 Primary

  using liquid crystals · CPC title

• G09G3/16

  by control of light from an independent source · CPC title