Display apparatus and image processing method thereof

US10515440B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10515440-B2
Application numberUS-201816027611-A
CountryUS
Kind codeB2
Filing dateJul 5, 2018
Priority dateAug 30, 2017
Publication dateDec 24, 2019
Grant dateDec 24, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display apparatus is provided. The display apparatus includes an input interface, a first storage, a display, and a processor. Pixel values corresponding to a predetermined number of lines in an image input through the input interface are stored in the first storage. The processor acquires a first patch of a predetermined size by sampling a number of pixel values located in an outer region of a matrix centering about a specific pixel value from among the pixel values stored in the first storage, acquires a high-frequency component for the specific pixel value based on the acquired first patch, and processes the input image based on the high-frequency component. The display displays the processed image.

First claim

Opening claim text (preview).

What is claimed is: 1. A display apparatus comprising: an input interface; a first storage; a display; and a processor configured to: control the first storage to store a plurality of pixel values corresponding to a predetermined number of lines of an image input through the input interface, acquire a first patch of a predetermined size by sampling a set of pixel values located in an outer region of a matrix centering around a specific pixel value from among the plurality of pixel values stored in the first storage, acquire a high-frequency component for the specific pixel value based on the first patch, process the input image based on the high-frequency component, and control the display to display the processed image. 2. The display apparatus as claimed in claim 1 , wherein the processor is further configured to acquire a second patch by changing positions of the set of pixel values based on the specific pixel value in the first patch according to a predetermined order and wherein the processor is configured to acquire the high-frequency component for the specific pixel value based on the second patch. 3. The display apparatus as claimed in claim 2 , wherein the processor is further configured to perform blurring processing on the second patch, acquires a third patch comprising the high-frequency component for the specific pixel value based on differences between a first set of pixel values included in the first patch and a second set of pixel values included in the blurring-processed second patch, and applies the acquired third patch to the specific pixel value of the input image. 4. The display apparatus as claimed in claim 3 , wherein the processor is further configured to acquire weight values for a third set of pixel values adjacent to the specific pixel value based on the differences between the specific pixel value in the first patch and the third set of pixel values and acquire the high-frequency component for the specific pixel value by applying a corresponding weight value among the acquired weight values to each of high-frequency components included in the third patch. 5. The display apparatus as claimed in claim 3 , wherein the processor is further configured to perform the blurring processing on a fourth set of pixel values located in a boundary region of the second patch by mirroring the fourth set of pixel values located in the boundary region of the second patch and arranging the mirrored fourth set of pixel values in an outer region of the second patch. 6. The display apparatus as claimed in claim 3 , wherein the processor is further configured to adjust an average value of high-frequency components included in the third patch to a predetermined value and applies the average value-adjusted third patch to the specific pixel value of the input image. 7. The display apparatus as claimed in claim 2 , wherein the processor is further configured to: acquire the first patch having a 3*3 form that the specific pixel value is surrounded with a fifth set of pixel values located at vertexes of a quadrangle circumscribed about a circle with a pixel interval predetermined based on the specific pixel value as a radius and a sixth set of pixel values located at contact points between the circle and the quadrangle, and acquire the second patch by fixing a position of the specific pixel value in the first patch and sequentially arranging pixel values spaced apart from each other based on the specific pixel value. 8. The display apparatus as claimed in claim 7 , wherein the processor is further configured to acquire the second patch by: acquiring neighboring pixel values, which are located in diagonal directions based on the specific pixel value in the first patch, in one direction from among clockwise and counterclockwise directions, sequentially arranging the neighboring pixel values, acquiring remaining pixel values in the same direction as the one direction, and sequentially arranging the remaining pixel values. 9. The display apparatus as claimed in claim 7 , wherein the first storage comprises an N-line memory corresponding to the predetermined number of lines, and wherein the processor is further configured to acquire the first patch by sampling a plurality of second pixel values in positions spaced by (N−1)/2 pixel interval to up, down, left, and right directions based on the specific pixel value located in (N+1)/2-th line among pixel values corresponding to the N lines stored in the first storage and a plurality of first pixel values located at vertexes of a quadrangle that the plurality of second pixel values are center points of edges. 10. The display apparatus as claimed in claim 1 , further comprising a second storage, wherein, when a high-frequency component for the specific pixel value is acquired, the processor is further configured to control the second storage to store the acquired high-frequency component and to sequentially acquire and store high-frequency components for next pixels in the second storage and when high-frequency components for all pixel values included in the input image are stored in the second storage, acquire a corrected image by applying the stored high-frequency components to corresponding pixel values. 11. An image processing method of a display apparatus, the method comprising: storing a plurality of pixel values corresponding to a predetermined number of lines of an input image; acquiring a first patch of a predetermined size by sampling a set of pixel values from among the plurality of pixel values, located in an outer region of a matrix centering about a specific pixel value among the stored plurality of pixel values; acquiring a high-frequency component for the specific pixel value based on the first patch; processing the image based on the high-frequency component; and displaying the processed image on a display of the display apparatus. 12. The method as claimed in claim 11 , wherein the acquiring of the high-frequency component comprises acquiring a second patch by changing positions of the set of pixel values based on the specific pixel value in the first patch according to a predetermined order. 13. The method as claimed in claim 12 , wherein the acquiring of the high-frequency component comprises performing blurring processing on the second patch and acquiring a third patch comprising the high-frequency component for the specific pixel value based on differences between a first set of pixel values in the first patch and a second set of pixel values in the blurring-processed second patch. 14. The method as claimed in claim 13 , wherein the acquiring of the high-frequency component comprises acquiring the high-frequency component for the specific pixel value by acquiring weight values for a third set of pixel values adjacent to the specific pixel value based on differences between the specific pixel value in the first patch and the third set of pixel values and applying a corresponding weight value among the acquired weight values to each of high-frequency components in the third patch. 15. The method as claimed in claim 13 , wherein the acquiring of the second patch comprises performing blurring processing on a fourth set of pixel values located in a boundary region of the second patch by mirroring the fourth set of pixel values located in the boundary region of the second patch and arranging the mirrored pixel values in an outer region of the second patch. 16. The method as claimed in claim 13 , further comprising adjusting an average value of high-frequency components in the third patch to a predetermined value and applyi

Assignees

Inventors

Classifications

  • involving conversion of the spatial resolution of the incoming video signal (for graphics images G09G2340/0407) · CPC title

  • by injecting details from different spectral ranges · CPC title

  • additional display device, e.g. video projector (digital output for controlling a plurality of local displays G06F3/1423) · CPC title

  • by altering the spatial resolution, e.g. for displaying on a connected PDA · CPC title

  • G06T3/4053Primary

    based on super-resolution, i.e. the output image resolution being higher than the sensor resolution · CPC title

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What does patent US10515440B2 cover?
A display apparatus is provided. The display apparatus includes an input interface, a first storage, a display, and a processor. Pixel values corresponding to a predetermined number of lines in an image input through the input interface are stored in the first storage. The processor acquires a first patch of a predetermined size by sampling a number of pixel values located in an outer region of…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H04N21/4122. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 24 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).