Variable frequency soft-switching control of a buck converter

Patent metadata

Field	Value
Publication number	US-10505451-B2
Application number	US-201916248373-A
Country	US
Kind code	B2
Filing date	Jan 15, 2019
Priority date	Mar 24, 2016
Publication date	Dec 10, 2019
Grant date	Dec 10, 2019

Abstract

A system and method are provided for controlling a modified buck converter circuit. A pull-up switching mechanism that is coupled to an upstream terminal of an inductor within a modified buck converter circuit is enabled. A load current at the output of the modified buck regulator circuit is measured. A capacitor current associated with a capacitor that is coupled to a downstream terminal of the inductor is continuously sensed and the pull-up switching mechanism is disabled when the capacitor current is greater than a sum of the load current and an enabling current value.

First claim

What is claimed is:

1. A modified buck regulator circuit, comprising: a pull-up switching mechanism; a pull-down switching mechanism that is coupled to the pull-up switching mechanism; an inductor having an upstream terminal that is coupled between the pull-up switching mechanism and the pull-down switching mechanism; a capacitor that is coupled to a downstream terminal of the inductor and in parallel with the pull-down switching mechanism; and a controller circuit that is coupled to the pull-up switching mechanism and the pull-down switching mechanism and configured to: measure a load current at an output of the modified buck converter circuit; determine a time duration during which the pull-up switching mechanism is enabled, wherein the time duration is calculated based on twice a sum of the load current and an enabling current that is an amount of current flowing from the downstream terminal of the inductor to the upstream terminal of the inductor needed to enable the pull-up switching mechanism in a soft-switching mode; enable the pull-up switching mechanism for the time duration; and disable the pull-up switching mechanism after the time duration.

2. The modified buck regulator circuit of claim 1 , wherein the time duration is a product of an inductance of the inductor divided by a high supply voltage and twice the sum of the load current and the enabling current value.

3. The modified buck regulator circuit of claim 1 , wherein the time duration is determined by performing a look-up operation in a look-up table using the measured load current.

4. The modified buck regulator circuit of claim 1 , wherein the controller is further configured to, after disabling the pull-up switching mechanism, wait a non-overlap time duration to enable the pull-down switching mechanism.

5. The modified buck regulator circuit of claim 4 , wherein the non-overlap time duration is calibrated during a previous operating cycle of the modified buck regulator circuit.

6. The modified buck regulator circuit of claim 1 , wherein the controller circuit is further configured to, prior to enabling the pull-up switching mechanism:
disable the pull-down switching mechanism; and
wait a non-overlap time duration before enabling the pull-up switching mechanism.

7. The modified buck regulator circuit of claim 6 , wherein the non-overlap time duration is calibrated during a previous operating cycle of the modified buck regulator circuit.

8. The modified buck regulator circuit of claim 1 , wherein the controller circuit is further configured to disable the pull-down switching mechanism when the output voltage is less than a reference voltage.

9. The modified buck regulator circuit of claim 1 , wherein a peak-to-peak ripple of current through the inductor is twice the sum of the load current and the enabling current value.

10. The modified buck regulator circuit of claim 1 , wherein the time duration is calculated based on a product of an inductance of the inductor and twice the sum of the load current and the enabling current value.

11. The modified buck regulator circuit of claim 1 , wherein, while the pull-down switching mechanism is disabled, the controller is configured to enable the pull-up switching mechanism when a voltage at the downstream terminal of the inductor is at least a high supply voltage.

12. The modified buck regulator circuit of claim 1 , wherein the enabling current is an amount of current needed to charge a capacitance at the upstream terminal of the inductor from a low supply voltage to a high supply voltage.

13. A modified buck regulator circuit, comprising:
a pull-up switching mechanism;
a pull-down switching mechanism that is coupled to the pull-up switching mechanism;
an inductor having an upstream terminal that is coupled between the pull-up switching mechanism and the pull-down switching mechanism;
a capacitor that is coupled to a downstream terminal of the inductor and in parallel with the pull-down switching mechanism; and
a controller circuit that is coupled to the pull-up switching mechanism and the pull-down switching mechanism and configured to:
measure a load current at an output of the modified buck converter circuit;
determine, based on the load current, a time duration during which the pull-up switching mechanism is enabled;
enable the pull-up switching mechanism for the time duration;
disable the pull-up switching mechanism after the time duration; and
after disabling the pull-up switching mechanism, wait a non-overlap time duration to enable the pull-down switching mechanism, wherein the non-overlap time duration is calibrated during a previous operating cycle of the modified buck regulator circuit by decreasing the non-overlap time duration when a voltage at the upstream terminal falls below a low supply voltage before the pull-down switching mechanism is enabled.

14. A modified buck regulator circuit, comprising:
a pull-up switching mechanism;
a pull-down switching mechanism that is coupled to the pull-up switching mechanism;
an inductor having an upstream terminal that is coupled between the pull-up switching mechanism and the pull-down switching mechanism;
a capacitor that is coupled to a downstream terminal of the inductor and in parallel with the pull-down switching mechanism; and
a controller circuit that is coupled to the pull-up switching mechanism and the pull-down switching mechanism and configured to:
measure a load current at an output of the modified buck converter circuit;
determine, based on the load current, a time duration during which the pull-up switching mechanism is enabled;
enable the pull-up switching mechanism for the time duration;
disable the pull-up switching mechanism after the time duration; and
after disabling the pull-up switching mechanism, wait a non-overlap time duration to enable the pull-down switching mechanism, wherein the non-overlap time duration is calibrated during a previous operating cycle of the modified buck regulator circuit by increasing the non-overlap time duration when the pull-down switching mechanism is enabled before a voltage at the upstream terminal falls below a low supply voltage.

15. A modified buck regulator circuit, comprising:
a pull-up switching mechanism;
a pull-down switching mechanism that is coupled to the pull-up switching mechanism;
an inductor having an upstream terminal that is coupled between the pull-up switching mechanism and the pull-down switching mechanism;
a capacitor that is coupled to a downstream terminal of the inductor and in parallel with the pull-down switching mechanism; and
a controller circuit that is coupled to the pull-up switching mechanism and the pull-down switching mechanism and configured to:
measure a load current at an output of the modified buck converter circuit;
determine, based on the load current, a time duration during which the pull-up switching mechanism is enabled;
prior to enabling the pull-up switching mechanism:
disable the pull-down switching mechanism; and
wait a non-overlap time duration before enabling the pull-up switching mechanism, wherein the non-overlap time duration is calibrated during a previous operating cycle of the modified buck regulator circuit by increasing the non-overlap time duration when the pull-up switching mechanism is enabled before a voltage at the upstream terminal rises to a high supply voltage;

enable the pull-up switching mechanism for the time duration; and
disable the pull-up switching mechanism after the time duration.

16. A modified buck regulator circuit, comprising:
a pull-up switching mechanism;
a pu

Assignees

• Nvidia Corp

Inventors

• Kudva Sudhir Shrikantha
• Dally William J
• Greer Iii Thomas Hastings
• Gray Carl Thomas

Classifications

• H02M3/158 Primary

  including plural semiconductor devices as final control devices for a single load · CPC title

• H02M1/08

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

• H02M3/157

  with digital control · CPC title

• H02M2003/1566

  Electricity · mapped topic

• H02M2001/0019

  Electricity · mapped topic