Wireless power receiving apparatus

Patent metadata

Field	Value
Publication number	US-10505396-B2
Application number	US-201615353338-A
Country	US
Kind code	B2
Filing date	Nov 16, 2016
Priority date	Nov 20, 2015
Publication date	Dec 10, 2019
Grant date	Dec 10, 2019

Abstract

A rectifier circuit includes an H-bridge circuit, and rectifies an AC current that flows through a reception antenna. A smoothing capacitor smoothes the output of the rectifier circuit. A demodulator demodulates an FSK-modulated electric power signal. A first comparator compares a voltage V AC1 at a first AC input terminal with a first threshold voltage V TH1 , and generates a first detection signal. A second comparator compares a voltage V AC2 at a second AC input terminal with a second threshold voltage V TH2 , and generates a second detection signal. A clock generating circuit generates a frequency detection clock CLK_OUT that transits according to a predetermined edge type of the first detection signal and a predetermined edge type of the second detection signal. A frequency detection circuit detects the frequency of the frequency detection clock.

First claim

What is claimed is:

1. A wireless power receiving apparatus that receives an electric power signal from a wireless power transmission apparatus, the wireless power receiving apparatus comprising:
a reception antenna comprising a reception coil structured to receive the electric power signal;
a rectifier circuit structured to rectify an AC current that flows through the reception antenna;
a smoothing capacitor structured to smooth an output of the rectifier circuit; and
a demodulator structured to demodulate the electric power signal subjected to Frequency Shift Keying (FSK) modulation,
wherein the rectifier circuit comprises:
an H-bridge circuit comprising a first AC input terminal coupled to the reception antenna and a second AC input terminal coupled to the reception antenna; and
a synchronous rectification controller structured to control the H-bridge circuit,
and wherein the demodulator comprises:
a first comparator structured to compare a voltage at the first AC input terminal with a first threshold voltage, so as to generate a first detection signal;
a second comparator structured to compare a voltage at the second AC input terminal with a second threshold voltage, so as to generate a second detection signal;
a clock generating circuit structured to generate a frequency detection clock that transits according to a given edge of the first detection signal and a given edge of the second detection signal; and
a frequency detection circuit structured to detect a frequency of the frequency detection clock,

wherein the clock generating circuit is structured to generate the frequency detection clock according to a positive edge of the second detection signal and a subsequent negative edge of the first detection signal.

2. The wireless power receiving apparatus according to claim 1 , wherein the clock generating circuit comprises:
an inverter structured to invert the first detection signal; and
a logic circuit structured to generate the frequency detection clock according to the second detection signal and the first detection signal inverted by the inverter.

3. The wireless power receiving apparatus according to claim 2 , wherein the clock generating circuit is structured to perform retiming of the inverted first detection signal and the second detection signal using an internal clock.

4. The wireless power receiving apparatus according to claim 3 , wherein the clock generating circuit further comprises:
a first chattering removal circuit structured to judge that a valid transition of the first detection signal has occurred in the first detection signal when the first detection signal remains at the same level over M cycles (M represents an integer of 2 or more) of the internal clock; and
a second chattering removal circuit structured to judge that a valid transition of the second detection signal has occurred in the second detection signal when the second detection signal remains at the same level over N cycles (N represents an integer of 2 or more) of the internal clock.

5. The wireless power receiving apparatus according to claim 3 , wherein the frequency detection circuit is structured to measure the frequency of the frequency detection clock using the internal clock.

6. The wireless power receiving apparatus according to claim 1 , wherein the clock generating circuit comprises:
a first one-shot circuit arranged on a path of the inverted first detection signal; and
a second one-shot circuit arranged on a path of the second detection signal.

7. The wireless power receiving apparatus according to claim 1 , wherein the synchronous rectification controller is structured to control the H-bridge circuit based on the first detection signal and the second detection signal.

8. The wireless power receiving apparatus according to claim 1 , that conforms to the Qi standard.

9. An electronic device comprising the wireless power receiving apparatus according to claim 1 .

10. A wireless power receiving apparatus that receives an electric power signal from a wireless power transmission apparatus, the wireless power receiving apparatus comprising:
a reception antenna comprising a reception coil structured to receive the electric power signal;
a rectifier circuit structured to rectify an AC current that flows through the reception antenna;
a smoothing capacitor structured to smooth an output of the rectifier circuit; and
a demodulator structured to demodulate the electric power signal subjected to Frequency Shift Keying (FSK) modulation,
wherein the rectifier circuit comprises:
an H-bridge circuit comprising a first AC input terminal coupled to the reception antenna and a second AC input terminal coupled to the reception antenna; and
a synchronous rectification controller structured to control the H-bridge circuit,
and wherein the demodulator comprises:
a first comparator structured to compare a voltage at the first AC input terminal with a first threshold voltage, so as to generate a first detection signal;
a second comparator structured to compare a voltage at the second AC input terminal with a second threshold voltage, so as to generate a second detection signal;
a clock generating circuit structured to generate a frequency detection clock that transits according to a given edge of the first detection signal and a given edge of the second detection signal; and
a frequency detection circuit structured to detect a frequency of the frequency detection clock,

wherein the clock generating circuit is structured to generate the frequency detection clock according to a negative edge of the second detection signal and a subsequent negative edge of the first detection signal.

11. A wireless power receiving apparatus that receives an electric power signal from a wireless power transmission apparatus, the wireless power receiving apparatus comprising:
a reception antenna comprising a reception coil structured to receive the electric power signal;
a rectifier circuit structured to rectify an AC current that flows through the reception antenna;
a smoothing capacitor structured to smooth an output of the rectifier circuit;
a demodulator structured to demodulate the electric power signal subjected to Frequency Shift Keying (FSK) modulation; and
a ringing suppressor structured to shift a parallel resonance frequency of the reception antenna during reception of an FSK signal,
wherein the rectifier circuit comprises:
an H-bridge circuit that comprises a first AC input terminal coupled to the reception antenna and a second AC input terminal coupled to the reception antenna; and
a synchronous rectification controller structured to control the H-bridge circuit, wherein the demodulator comprises:
a first comparator structured to compare a voltage at the first AC input terminal with a first threshold voltage, so as to generate a first detection signal;
a second comparator structured to compare a voltage at the second AC input terminal with a second threshold voltage, so as to generate a second detection signal;
a clock generating circuit structured to generate a frequency detection clock that transits according to a given edge of the first detection signal and a given edge of the second detection signal;
a frequency detection circuit structured to detect the frequency of the frequency detection clock, and

wherein the clock generating circuit is structured to generate the frequency detection clock according to a positive edge of the second detection signal and a subsequent negative edge of the first detection signal.

12. The wireless power receiving apparatus according to claim 11 , wherein the ringing suppressor comprises:
a first capacitor and a

Assignees

• Rohm Co Ltd

Inventors

• Iwasaki Tatsuya
• Nozawa Takeshi
• Yamamoto Isao
• Yasuoka Kazuyoshi

Classifications

• H02J50/12 Primary

  of the resonant type · CPC title

• H02J50/80

  involving the exchange of data, concerning supply or distribution of electric power, between transmitting devices and receiving devices · CPC title

• H02J7/025

  Electricity · mapped topic