Dual control apparatus and control method for HVDC system

Patent metadata

Field	Value
Publication number	US-10505368-B2
Application number	US-201616067516-A
Country	US
Kind code	B2
Filing date	Jun 22, 2016
Priority date	Dec 30, 2015
Publication date	Dec 10, 2019
Grant date	Dec 10, 2019

Abstract

Provided is a dual control apparatus and control method for a high voltage direct current (HVDC) system. The dual control apparatus comprises: a first controller and a second controller operated in a dual manner, the first controller and the second controller each including: a deviation calculation unit calculating a deviation between a target value and a control value; a PI controller performing proportional control and integral control on the deviation; a first buffer storing an error value for the integral control performed by the PI controller of a relevant one of the first and second controllers; and a second buffer storing an error value for the integral control performed by the PI controller of a remaining one of the first and second controllers.

First claim

The invention claimed is:

1. A dual control apparatus for a HVDC system, the apparatus comprising:
a first controller and a second controller operated in a dual manner, the first controller and the second controller each including:
a deviation calculation unit calculating a deviation between a target value and a control value;
a PI controller performing proportional control and integral control on the deviation;
a first buffer storing an error value for the integral control performed by the PI controller of a relevant one of the first and second controllers; and
a second buffer storing an error value for the integral control performed by the PI controller of a remaining one of the first and second controllers,
wherein the PI controller of the first controller performs, using the error value stored in the first buffer of the first controller, the proportional control and the integral control on the deviation, and the PI controller of the second controller performs, using the error value stored in the second buffer of the second controller, the proportional control and the integral control on the deviation.

2. The dual control apparatus of claim 1 , wherein each of the first controller and the second controller stores the error value for the integral control performed by the PI controller of the relevant one of the first and second controllers in the first buffer of the relevant one, and provides the error value to the remaining one of the first and second controllers, and
the remaining one stores the received error value in the second buffer thereof.

3. The dual control apparatus of claim 2 , wherein when switching from the first controller to the second controller is performed, the PI controller of the second controller performs, using the error value stored in the first buffer of the second controller, the proportional control and the integral control on the deviation, and the PI controller of the first controller performs, using the error value stored in the second buffer of the first controller, the proportional control and the integral control on the deviation.

4. The dual control apparatus of claim 1 , further comprising:
a switching unit performing switching to select one of an output value of the PI controller of the first controller and an output value of the PI controller of the second controller,
wherein one of the output values of the PI controllers of the first controller and the second controller is provided to the HVDC system according to the switching of the switching unit.

5. A dual control method for a HVDC system, the method comprising:
a step a) of calculating, by a deviation calculation unit of a first controller, a deviation between a target value and a control value;
a step b) of performing, by a PI controller of the first controller, first proportional control and first integral control on the deviation;
a step c) of storing, by the first controller, an error value for the first integral control performed by the PI controller in a first buffer of the first controller;
a step d) of providing, by the first controller, the error value to a second controller;
a step e) of storing, by the second controller, the received error value in a second buffer of the second controller;
a step f) of performing, by the PI controller of the first controller, second proportional control and second integral control on the deviation using the error value stored in the first buffer of the first controller; and
a step g) of performing, by a PI controller of the second controller, third proportional control and third integral control on the deviation using the error value stored in the second buffer of the second controller.

6. The dual control method of claim 5 , further comprising: after the step g),
a step g1) of storing, by the second controller, an error value for the third integral control performed by the PI controller of the second controller in a first buffer of the second controller;
a step g2) of providing, by the second controller, the error value stored in the first buffer of the second controller to the first controller; and
a step g3) of storing, by the first controller, the received error value in a second buffer of the first controller.

7. The dual control method of claim 6 , further comprising: after the step g3), when switching from the first controller to the second controller is performed,
a step g4) of performing, by the PI controller of the second controller, fourth proportional control and fourth integral control on the deviation using the error value stored in the first buffer of the second controller; and
a step g5) of performing, by the PI controller of the first controller, fifth proportional control and fifth integral control on the deviation using the error value stored in the second buffer of the first controller.

8. The dual control method of claim 7 , further comprising: after the step g4),
storing, by the PI controller of the second controller, an error value for the fourth integral control in the first buffer of the second controller.

9. The dual control method of claim 7 , further comprising: after the step g5),
storing, by the PI controller of the first controller, an error value for the fifth integral control in the first buffer of the first controller; and
providing the error value stored in the first buffer of the first controller to the second controller.

Assignees

• Hyosung Heavy Ind Corp

Inventors

• Oh Sung Min

Classifications

• G05B9/03 Primary

  with multiple-channel loop, i.e. redundant control systems · CPC title

• H02J3/36 Primary

  Arrangements for transfer of electric power between AC networks via high-voltage DC [HVDC] links; Arrangements for transfer of electric power between generators and networks via HVDC links · CPC title

• H02M5/40

  with intermediate conversion into DC · CPC title

• H02M1/00

  Details of apparatus for conversion · CPC title

• H02M2001/0012

  Electricity · mapped topic