Impedance matching in very high dielectric constant isolator/circulator junctions
US-2016028139-A1 · Jan 28, 2016 · US
US10505246B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10505246-B2 |
| Application number | US-201615239942-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 18, 2016 |
| Priority date | Aug 18, 2016 |
| Publication date | Dec 10, 2019 |
| Grant date | Dec 10, 2019 |
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A method for preventing corona effects in an electronic circuit comprising the steps of applying a parylene coating to a surface of the electronic circuit, and applying a polyalphaolefin dielectric oil having a dielectric constant that is lower than that of the parylene coating on an exposed surface of the first material.
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What is claimed is: 1. A method for preventing corona effect in a circulator including an electronic circuit with at least one of garnets or ferrites comprising the steps of: applying a first polymer material having a first dielectric strength on a surface of the electronic circuit; applying a second polymer material comprising a polyalphaolefin (PAO) dielectric oil having a second dielectric strength that is lower than the first dielectric strength of the first polymer material, on exposed surfaces of the first polymer material. 2. The method of claim 1 , wherein the first polymer material comprises a parylene coating applied on the surface of the electronic circuit. 3. The method of claim 2 , wherein the parylene coating has a dielectric strength of approximately 7,000 volts per mil (V/mil). 4. The method of claim 1 , wherein the dielectric oil comprises a dielectric strength of approximately 500 volts per mil (V/mil). 5. The method of claim 1 , wherein the first polymer material is applied on a surface of garnets of the circulator. 6. The method of claim 1 , further comprising the step of arranging the electronic circuit within a housing. 7. The method of claim 6 , wherein the step of applying a first polymer material on a surface of the electronic circuit comprises the steps of: applying a first coating of the first polymer material on a surface of the electronic circuit; and applying a second coating of the first polymer material on at least one of the first coating of the first polymer material and a surface of the electronic circuit after the circuit is arranged within the housing. 8. The method of claim 7 , wherein the second coating of the first polymer material is applied on garnets of the circulator after the circulator is arranged within the housing. 9. The method of claim 6 , wherein the second polymer material is applied by filling a remaining volume of the housing with the second polymer material. 10. The method of claim 9 , further comprising the step of hermetically sealing the housing from an external environment. 11. A method for preventing corona effect in a circulator including an electronic circuit with at least one of garnets or ferrites comprising the steps of: applying a first coating of a first polymer material having a first dielectric strength on a surface of the electronic circuit; arranging the electronic circuit within an enclosure after applying the first coating of the first polymer material; applying, after arranging of the electronic circuit within the enclosure, a second coating of the first polymer material to exposed surfaces within the enclosure; applying a second polymer material comprising a polyalphaolefin (PAO) dielectric oil having a second dielectric strength that is lower than the first dielectric strength of the first polymer material, on exposed surfaces of the first polymer material within the enclosure. 12. The method of claim 11 , wherein the first polymer material comprises a parylene coating applied on the surface of the electronic circuit. 13. The method of claim 12 , wherein the parylene coating has a dielectric strength of approximately 7,000 volts per mil (V/mil). 14. The method of claim 13 , wherein the dielectric oil comprises a dielectric strength of approximately 500 volts per mil (V/mil).
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Applying non-metallic protective coatings {(H05K3/0091 takes precedence; methods for intermediate insulating layers for build-up multilayer circuits H05K3/4673)} · CPC title
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