Microwave attenuators on high-thermal conductivity substrates for quantum applications

Patent metadata

Field	Value
Publication number	US-10505245-B2
Application number	US-201815894631-A
Country	US
Kind code	B2
Filing date	Feb 12, 2018
Priority date	Feb 12, 2018
Publication date	Dec 10, 2019
Grant date	Dec 10, 2019

Abstract

Techniques related to microwave attenuator son high-thermal conductivity substrates for quantum applications are provided. A device can comprise a substrate that provides a thermal conductivity level that is more than a defined thermal conductivity level. The device can also comprise one or more thin film lines, on a top surface of the substrate, comprising an evaporated alloy. Further, the device can comprise one or more vias within the substrate. Respective first ends of the one or more vias are can be connected to respective thin film connectors. Further, respective second ends of the one or more vias can be connected to an electrical ground.

First claim

What is claimed is:

1. A device, comprising:
a substrate that provides a thermal conductivity level that is more than a defined thermal conductivity level;
one or more thin film lines, on a top surface of the substrate, comprising an evaporated alloy; and
one or more vias within the substrate, wherein respective first ends of the one or more vias are connected to respective thin film connectors and respective second ends of the one or more vias are connected to an electrical ground.

2. The device of claim 1 , wherein the substrate comprises a material selected from a group consisting of sapphire, fused silica, quartz, Magnesium Oxide (MgO), and Gallium Arsenide (GaAs).

3. The device of claim 1 , wherein the one or more thin film lines comprise an alloy selected from a group consisting of copper and Nichrome (NiCr).

4. The device of claim 1 , wherein the one or more thin film lines comprise an alloy that comprises seventy percent nickel and thirty percent chromium.

5. The device of claim 1 , wherein the one or more vias comprise copper.

6. The device of claim 1 , wherein the device comprises one or more resistors, and wherein the respective thin film connections and the one or more vias remove hot electrons from the one or more resistors.

7. The device of claim 1 , wherein the thermal conductivity level of the substrate is in a range of around 100 to 200 watts per meter per Kelvin (W/m/K).

8. The device of claim 1 , further comprising a ground plane, wherein the substrate is over the ground plane.

9. The device of claim 1 , wherein the device is a microwave attenuator device that is employed in cryogenic environments.

10. A microwave attenuator device, comprising:
a substrate that provides a thermal conductivity level that is more than a defined thermal conductivity level;
one or more thin film lines, on a top surface of the substrate, comprising an evaporated alloy; and
one or more vias within the substrate, wherein respective first ends of the one or more vias are connected to respective thin film connectors and respective second ends of the one or more vias are connected to an electrical ground.

11. The microwave attenuator device of claim 10 , wherein the substrate comprises a material selected from a group consisting of sapphire, fused silica, quartz, Magnesium Oxide (MgO), and Gallium Arsenide (GaAs).

12. The microwave attenuator device of claim 10 , wherein the one or more thin film lines comprise an alloy selected from a group consisting of copper and Nichrome (NiCr), and wherein the one or more vias comprise the copper.

13. A method, comprising:
evaporating an alloy on a top surface of a substrate to form one or more thin film lines, wherein the substrate provides a thermal conductivity level that is more than a defined thermal conductivity level;
forming one or more vias within the substrate;
connecting respective first ends of the one or more vias to respective thin film connectors; and
electrically grounding respective second ends of the one or more vias.

14. The method of claim 13 , wherein the substrate comprises a material selected from a group consisting of sapphire, fused silica, quartz, Magnesium Oxide (MgO), and Gallium Arsenide (GaAs).

15. The method of claim 13 , wherein the evaporating the alloy on the top surface of the substrate comprises evaporating a material selected from a group consisting of copper and Nichrome (NiCr) to form the one or more thin film lines.

16. The method of claim 13 , wherein the evaporating the alloy on the top surface of the substrate comprises evaporating the alloy that comprises seventy percent nickel and thirty percent chromium.

17. The method of claim 13 , further comprises evaporating copper within the one or more vias.

18. The method of claim 13 , further comprises forming one or more resistors on the substrate, and wherein the respective thin film connectors and the one or more vias remove hot electrons from the one or more resistors.

19. The method of claim 13 , wherein the thermal conductivity level of the substrate is in a range of around 100 to 200 watts per meter per Kelvin (W/m/K).

20. The method of claim 13 , further comprising:
providing a ground plane, wherein the substrate is located over the ground plane.

Assignees

• IBM

Inventors

• Olivadese Salvatore Bernardo
• Gumann Patryk
• Gambetta Jay M
• Chow Jerry M

Classifications

• H01P5/028 Primary

  between strip lines · CPC title

• H05K3/00

  Apparatus or processes for manufacturing printed circuits · CPC title

• H05K1/00

  Printed circuits · CPC title

• H05K1/092

  Dispersed materials, e.g. conductive pastes or inks · CPC title

• H01P11/003

  Manufacturing lines with conductors on a substrate, e.g. strip lines, slot lines · CPC title