Coating method utilizing phosphor containment structure and devices fabricated using same

Patent metadata

Field	Value
Publication number	US-10505083-B2
Application number	US-82762607-A
Country	US
Kind code	B2
Filing date	Jul 11, 2007
Priority date	Jul 11, 2007
Publication date	Dec 10, 2019
Grant date	Dec 10, 2019

Abstract

Methods for fabricating a semiconductor devices, and in particular light emitting diodes (LEDS) comprising providing a plurality of semiconductor devices on a substrate and forming a contact on at least some of the semiconductor devices. A containment structure is formed on at least some of the semiconductor devices having a contact with each containment structure defining a deposition area excluding the contact. A coating material is deposited then within the deposition area, with the coating material not covering the contact. A light emitting diode (LED) chip wafer comprising a plurality of LEDs on a substrate wafer with at least some of the LEDs having a contact. A plurality of containment structures are included, each of which is associated with a respective one of the plurality of LEDs. Each of the containment structures at least partially on its respective one of the LEDs and defining a deposition area on its respective one of the LEDs. The deposition area excludes the contact. A coating is included in each of the deposition areas.

First claim

We claim:

1. A wafer, comprising:
a plurality of light-emitting diodes (LEDs), each comprising sidewalls;
a contact on a first area of a surface of each LED in said plurality of LEDs;
a mask layer on said sidewalls and over at least a portion of said LEDs;
first and second openings in said mask layer over said first area and a second area on said surface of said LED, respectively;
wherein a portion of said mask layer comprises a plurality of containment structures, each containment structure comprising a rigid material and coupled to a respective one of said LEDs, wherein each containment structure defines said second area on said surface of each said respective LED, said second area differing from said first area, wherein said containment structure defines the borders of said second opening in said mask layer over said second area;
a phosphor material coating at least partially contained within each of said containment structures over each said second area on said surface of each said respective LED, wherein said phosphor material coating is excluded from substantially all of said first area and said contact; and
a dome shaped binder material, different from the material of said phosphor material coating, and having sidewalls substantially aligned with outer sidewalls of said containment structure.

2. The wafer of claim 1 , wherein at least a portion of each of said containment structures is adjacent to its respective LED.

3. The wafer of claim 1 , wherein each of said containment structures is on said LED.

4. The wafer of claim 1 , further comprising an opening to each said LED, each said window within its respective said second area.

5. The wafer of claim 1 , wherein said mask layer extends outside of said containment structures, said mask layer further comprising openings to access said contacts.

6. The wafer of claim 1 , further comprising a plurality of openings in said mask layer over respective ones of said LEDs.

7. The wafer of claim 6 , wherein each of said openings comprises at least one edge and said at least one edge of said opening comprises one of said containment structures.

8. The wafer of claim 1 , wherein each of said containment structures is made of the same material as said mask layer.

9. The wafer of claim 1 , wherein said wafer is capable of being separated into LED chips.

10. The wafer of claim 1 , wherein said phosphor material coating comprises a phosphor and a binder.

11. The wafer of claim 1 , wherein said phosphor material coating comprises a phosphor layer and said dome shaped binder material is located above said phosphor layer.

12. The wafer of claim 11 , wherein said dome shaped binder material is located above said containment structure.

13. The wafer of claim 1 , wherein said phosphor material coating comprises a textured surface.

14. The claim 1 , wherein said phosphor material coating comprises multiple phosphors.

15. The wafer of claim 1 , wherein said phosphor material coating comprises scattering particles.

16. The wafer of claim 1 , wherein said phosphor material coating comprises a phosphor loaded binder.

17. The wafer of claim 1 , wherein said binder comprises one of the materials from the group consisting of silicone, epoxy, glass, spin-on glass, BCB, polymides and polymers.

18. The wafer of claim 1 , wherein said phosphor material coating comprises YAG:Ce phosphor.

19. The wafer of claim 1 , wherein said LEDs are made of materials from the Group-III nitride material system.

20. The wafer of claim 1 , wherein said wafer comprises a growth substrate.

21. The wafer of claim 1 , wherein said wafer comprises a carrier substrate.

22. The wafer of claim 1 , further comprising a reflective layer formed integral to said wafer.

23. The wafer of claim 1 , wherein each LED in said plurality of LEDs is capable of emitting white light.

24. The wafer of claim 1 , wherein said rigid material comprises an insulating material.

25. The wafer of claim 24 , wherein said insulating material comprises a dielectric material.

26. The wafer of claim 1 , wherein said rigid material comprises a semiconductor material.

27. The wafer of claim 1 , wherein said rigid material comprises a metal.

28. A light emitting diode (LED) chip, comprising:
an LED comprising sidewalls;
a contact on a first area of a surface of said LED;
a mask layer on said sidewalls and over at least a portion of said LED;
first and second openings in said mask layer over said first area and a second area on said surface of said LED, respectively;
wherein a portion of said mask layer comprises a containment structure, said containment structure comprising a rigid material and coupled to said LED, said containment structure defining said second area differing from said first area on said surface of said LED, wherein said containment structure defines the borders of said second opening in said mask layer over said second area;
a phosphor material coating at least partially contained within said containment structure and over said second area on the surface of said LED, wherein said phosphor material coating is excluded from substantially all of said first area and said contact; and
a dome shaped binder material, different from the material of said phosphor material coating, and having sidewalls substantially aligned with outer sidewalls of said containment structure.

29. The LED chip of claim 28 , wherein said mask layer extends outside said containment structure, said mask layer further comprising an opening to access said contact.

30. The LED chip of claim 28 , further comprising a window in said mask layer.

31. The LED chip of claim 30 , wherein the edge of said window comprises said containment structure.

32. The LED chip of claim 30 , wherein said containment structure is a portion of said mask layer, around said window.

33. The LED chip of claim 30 , wherein said containment structure is made of the same material as said mask layer.

34. The LED chip of claim 28 , wherein said rigid material comprises an insulating material.

35. The LED chip of claim 34 , wherein said insulating material comprises a dielectric material.

36. The LED chip of claim 28 , wherein said rigid material comprises a semiconductor material.

37. The LED chip of claim 28 , wherein said rigid material comprises a metal.

Assignees

• Ibbetson James
• Wong Kristi
• Becerra Maryanne
• Cree Inc

Inventors

• Ibbetson James
• Wong Kristi
• Becerra Maryanne

Classifications

• H01L33/508 Primary

  Electricity · mapped topic

• H01L33/44

  Electricity · mapped topic

• H01L33/54

  Electricity · mapped topic

• H01L2933/0041

  Electricity · mapped topic

• H10H20/853

  characterised by their shape · CPC title