Preparation method for array substrate

Patent metadata

Field	Value
Publication number	US-10504941-B2
Application number	US-201715657413-A
Country	US
Kind code	B2
Filing date	Jul 24, 2017
Priority date	Jul 25, 2016
Publication date	Dec 10, 2019
Grant date	Dec 10, 2019

Abstract

The present invention provides an array substrate comprising a substrate, a metal conductive film layer, and an anti-reflective film layer located between the substrate and the metal conductive film layer, and a method for manufacturing the same, as well as a display device. The method comprises step S1: forming an anti-reflective film layer on a substrate by adjusting the reaction power and/or reactive gas flow during the formation of film by the chemical vapor deposition process; and step S2: forming a metal conductive film layer on the substrate finished in step S1. Through the preparation method of the array substrate, the anti-reflective film layer can have a sand-like granulation structure, such that light reflected from the metal conductive film layer can be blocked, thereby weakening or avoiding the light reflected from the surface of the metal conductive film layer, further improving the display effect of the array substrate.

First claim

The invention claimed is:

1. A method for manufacturing an array substrate, characterized by comprising:
step S1: forming an anti-reflective film layer on a substrate, wherein the anti-reflective film layer has a sand-like granulation structure by adjusting the reaction power and/or reactive gas flow during the chemical vapor deposition process; and
step S2: forming a metal conductive film layer on the anti-reflective film layer.

2. The method for manufacturing an array substrate according to claim 1 , characterized in that, the step “forming an anti-reflective film layer on a substrate by adjusting the reaction power during the chemical vapor deposition process” includes a first stage and a second stage, in which the first stage and the second stage are carried out continuously, and the reaction power of the first stage is higher than that of the second stage by 50% or more, and alternatively the reaction power of the first stage is lower than that of the second stage by 50% or more.

3. The method for manufacturing an array substrate according to claim 1 , characterized in that, the step “forming an anti-reflective film layer on a substrate by adjusting the reactive gas flow during the chemical vapor deposition process” includes a first stage and a second stage, in which the first stage and the second stage are carried out continuously, and the reactive gas flow of the first stage is higher than that of the second stage by 20% or more, and alternatively the reactive gas flow of the first stage is lower than that of the second stage by 50% or more.

4. The method for manufacturing an array substrate according to claim 2 , characterized in that, the first stage is within 1 to 3 seconds from the beginning of the deposition of the anti-reflective film layer.

5. The method for manufacturing an array substrate according to claim 3 , characterized in that, the first stage is within 1 to 3 seconds from the beginning of the deposition of the anti-reflective film layer.

6. The method for manufacturing an array substrate according to claim 1 , characterized in that, the anti-reflective film layer comprises a silicon nitride film layer an amorphous silicon film layer.

7. The method for manufacturing an array substrate according to claim 6 , characterized in that, when forming the amorphous silicon film layer, the step S1 further comprises: doping the amorphous silicon film layer so as to darken the color of the amorphous silicon film layer.

8. The method for manufacturing an array substrate according to claim 1 , characterized in that, it further comprises a step of forming an indium tin oxide film layer and performing atomization of the indium tin oxide film layer before or after the step S1.

9. The method for manufacturing an array substrate according to claim 8 , characterized in that, it further comprises S3: performing a patterning process of the anti-reflective film layer, the indium tin oxide film layer and the metal conductive film layer, so as to form a pattern including the metal conductive layer, the anti-reflective layer and the indium tin oxide layer.

10. An array substrate manufactured by the method according to claim 1 , comprising a substrate and a metal conductive layer, characterized in that, it further comprises an anti-reflective layer located between the substrate and the metal conductive layer, and the anti-reflective layer has a plurality of sand-like granulation structures.

11. The array substrate according to claim 10 , characterized in that, the anti-reflective layer and the metal conductive layer are overlapped completely, and the anti-reflective layer comprises a silicon nitride layer or an amorphous silicon layer.

12. The array substrate according to claim 11 , characterized in that, it further comprises an atomized indium tin oxide layer, which is located between the anti-reflective layer and the metal conductive layer or between the anti-reflective layer and the substrate.

13. A display device, characterized by comprising the array substrate according to claim 10 .

14. The display device according to claim 13 , characterized in that, it further comprises a color filter substrate and back light, wherein the array substrate and the color filter substrate are aligned, and the back light is set on the side of the color filter substrate away from the array substrate.

15. The method for manufacturing an array substrate according to claim 1 , characterized in that, the anti-reflective film layer comprises a silicon nitride film layer and an amorphous silicon film layer.

16. The array substrate according to claim 10 , characterized in that, the anti-reflective layer and the metal conductive layer are overlapped completely, and the anti-reflective layer comprises a silicon nitride layer and an amorphous silicon layer.

Assignees

• Boe Technology Group Co Ltd
• Beijing Boe Display Tech Co

Inventors

• Li Liangliang
• Guo Huibin
• Wang Shoukun
• Feng Yuchun
• Liu Yao

Classifications

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

• H10P14/6903

  containing silicon · CPC title

• H10P14/6328

  Deposition from the gas or vapour phase · CPC title

• H10P14/665

  Porous materials · CPC title

• H10W20/074

  of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers · CPC title