Array substrate, display panel and display device

Patent metadata

Field	Value
Publication number	US-10504933-B2
Application number	US-201815941322-A
Country	US
Kind code	B2
Filing date	Mar 30, 2018
Priority date	Sep 25, 2017
Publication date	Dec 10, 2019
Grant date	Dec 10, 2019

Abstract

The present disclosure relates to an array substrate, a display panel and a display device. The array substrate includes a substrate, data lines, gate lines, and a pixel unit, wherein a pixel electrode and a light shielding portion are disposed in the pixel unit, and for the light shielding portion and the data line corresponding to each other, an orthographic projection on the substrate of the light shielding portion is partially overlapped with an orthographic projection on the substrate of the data line, and wherein a part of each side, that is parallel to the data line, of an orthographic projection on the substrate of the pixel electrode is only overlapped with the orthographic projection on the substrate of the data line, and the other part of the each side is only overlapped with the orthographic projection on the substrate of the light shielding portion.

First claim

What is claimed is:

1. An array substrate, comprising:
a substrate;
a plurality of data lines and a plurality of gate lines which are formed on the substrate and crossed with each other; and
a pixel unit formed in an area defined by two adjacent data lines and two adjacent gate lines,
wherein the pixel unit comprises a pixel electrode and a light shielding portion that corresponds to the data line, and wherein an orthographic projection of the light shielding portion on the substrate is partially overlapped with an orthographic projection of the corresponding data line on the substrate, and
wherein, each side, that is parallel to the data line, of an orthographic projection of the pixel electrode on the substrate comprises a first part which is overlapped only with the orthographic projection of the data line on the substrate and a second part which is overlapped only with the orthographic projection of the light shielding portion on the substrate,
wherein the pixel electrode comprises a first pixel sub-electrode and a second pixel sub-electrode, both arranged in a column direction of the pixel unit, fabricated in a same layer and electrically connected to each other,
wherein the first pixel sub-electrode has two sides that are parallel to the data line, an orthographic projection of one of the two sides on the substrate is overlapped with the orthographic projection of the data line adjacent to the one of the two sides of the pixel electrode on the substrate, and an orthographic projection of the other one of the two sides on the substrate is overlapped with the orthographic projection of the light shielding portion corresponding to the data line adjacent to the other one of the two sides of the pixel electrode on the substrate,
wherein the second pixel sub-electrode has two sides that are parallel to the data line, an orthographic projection of one of the two sides on the substrate is overlapped with the orthographic projection of the data line adjacent to the one of the two sides of the pixel electrode on the substrate, and an orthographic projection of the other side of the two sides on the substrate is overlapped with the orthographic projection of the light shielding portion corresponding to the data line adjacent to the other one of the two sides of the pixel electrode on the substrate,
wherein the light shielding portions comprises a first light shielding sub-portion and a second light shielding sub-portion, both arranged in a column direction of the pixel unit, wherein an orthographic projection of a side of the first light shielding sub-portion toward the first pixel sub-electrode on the substrate is overlapped with the orthographic projection of the data line corresponding to the light shielding portion on the substrate, and an orthographic projection of a side of the second light shielding sub-portion away from the second pixel sub-electrode on the substrate is overlapped with an orthographic projection of the data line corresponding to the light shielding portion on the substrate,
wherein the light shielding portion is a metal light shielding layer electrically connected to the gate line and a common electrode signal line,
wherein the first light shielding sub-portion and the second light shielding sub-portion are electrically connected to each other and disposed in a same layer, an end of the first light shielding sub-portion away from the second light shielding sub-portion is electrically connected to the gate line, and an end of the second light shielding sub-portion away from the first light shielding sub-portion is electrically connected to the common electrode signal line.

2. A display panel, comprising an array substrate,
wherein the array substrate comprises:
a substrate;
a plurality of data lines and a plurality of gate lines which are formed on the substrate and crossed with each other; and
a pixel unit formed in an area defined by two adjacent data lines and two adjacent gate lines,
wherein the pixel unit comprises a pixel electrode and a light shielding portion that corresponds to the data line, and wherein an orthographic projection of the light shielding portion on the substrate is partially overlapped with an orthographic projection of the corresponding data line on the substrate, and
wherein, each side, that is parallel to the data line, of an orthographic projection of the pixel electrode on the substrate comprises a first part which is overlapped only with the orthographic projection of the data line on the substrate and a second part which is overlapped only with the orthographic projection of the light shielding portion on the substrate,
wherein the pixel electrode comprises a first pixel sub-electrode and a second pixel sub-electrode, both arranged in a column direction of the pixel unit, fabricated in a same layer and electrically connected to each other,
wherein the first pixel sub-electrode has two sides that are parallel to the data line, an orthographic projection of one of the two sides on the substrate is overlapped with the orthographic projection of the data line adjacent to the one of the two sides of the pixel electrode on the substrate, and an orthographic projection of the other one of the two sides on the substrate is overlapped with the orthographic projection of the light shielding portion corresponding to the data line adjacent to the other one of the two sides of the pixel electrode on the substrate,
wherein the second pixel sub-electrode has two sides that are parallel to the data line, an orthographic projection of one of the two sides on the substrate is overlapped with the orthographic projection of the data line adjacent to the one of the two sides of the pixel electrode on the substrate, and an orthographic projection of the other side of the two sides on the substrate is overlapped with the orthographic projection of the light shielding portion corresponding to the data line adjacent to the other one of the two sides of the pixel electrode on the substrate,
wherein the light shielding portions comprises a first light shielding sub-portion and a second light shielding sub-portion, both arranged in a column direction of the pixel unit, wherein an orthographic projection of a side of the first light shielding sub-portion toward the first pixel sub-electrode on the substrate is overlapped with the orthographic projection of the data line corresponding to the light shielding portion on the substrate, and an orthographic projection of a side of the second light shielding sub-portion away from the second pixel sub-electrode on the substrate is overlapped with an orthographic projection of the data line corresponding to the light shielding portion on the substrate,
wherein the light shielding portion is a metal light shielding layer electrically connected to the gate line and a common electrode signal line,
wherein the first light shielding sub-portion and the second light shielding sub-portion are electrically connected to each other and disposed in a same layer, an end of the first light shielding sub-portion away from the second light shielding sub-portion is electrically connected to the gate line, and an end of the second light shielding sub-portion away from the first light shielding sub-portion is electrically connected to the common electrode signal line.

3. A display device, comprising a display panel having an array substrate,
wherein the array substrate comprises:
a substrate;
a plurality of data lines and a plurality of gate lines which are formed on the substrate and crossed with each other; and
a pixel unit formed in an area defined by two adjacent data lines and two adjacent gate lines,
wherein the pixel unit comprises a pixel electrode and a light shielding portion that corresponds to the data line, and wherein an orthographic projection of the light shielding portion on th

Assignees

• Boe Technology Group Co Ltd
• Chongqing Boe Optoelectronics Tech Co Ltd

Inventors

• Li Shaoru
• Kim Hee Cheol

Classifications

• G02F1/136286

  Wiring, e.g. gate line, drain line · CPC title

• G02F2201/121

  common or background · CPC title

• G02F1/136209

  Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element · CPC title

• G02F2201/123

  pixel · CPC title

• H01L27/124 Primary

  Electricity · mapped topic