Field emission devices and methods of making thereof

Patent metadata

Field	Value
Publication number	US-10504772-B2
Application number	US-201715630597-A
Country	US
Kind code	B2
Filing date	Jun 22, 2017
Priority date	Jul 25, 2012
Publication date	Dec 10, 2019
Grant date	Dec 10, 2019

Abstract

In one embodiment of the present invention, an electronic device includes a first emitter/collector region and a second emitter/collector region disposed in a substrate. The first emitter/collector region has a first edge/tip, and the second emitter/collector region has a second edge/tip. A gap separates the first edge/tip from the second edge/tip. The first emitter/collector region, the second emitter/collector region, and the gap form a field emission device.

First claim

What is claimed is:

1. A method of forming an electronic device, the method comprising:
forming a first trench and a second trench in a substrate; and
forming a first edge/tip and a second edge/tip by forming a first cavity under the first trench and a second cavity under the second trench, wherein the first cavity intersects with the second cavity to form the first edge/tip and the second edge/tip, wherein the first edge/tip is above and opposite the second edge/tip, and wherein the first edge/tip and the second edge/tip form part of a first field emission device;
before forming the first edge/tip and the second edge/tip, forming first isolation liner on sidewalls of the first trench and a second isolation liner on sidewalls of the second trench;
forming a capping layer over and completely sealing the first trench and the second trench, the capping layer being structurally coupled to the first edge/tip;
forming a contact over the substrate and through the capping layer after forming the first cavity under the first trench and the second cavity under the second trench; and
forming a third edge/tip in a central bottom portion of the first cavity.

2. The method of claim 1 , wherein the first isolation liner and the second isolation liner comprise an oxide.

3. The method of claim 1 , wherein forming the first cavity under the first trench and the second cavity under the second trench comprises etching the substrate exposed by the first trench and the second trench with an isotropic etching process.

4. The method of claim 3 , wherein the isotropic etching process comprises using a nitric acid and hydrofluoric acid etchant.

5. The method of claim 1 , wherein the first isolation liner and the second isolation liner comprise nitride.

6. The method of claim 5 , wherein forming the first cavity under the first trench and the second cavity under the second trench comprises oxidizing the substrate exposed by the first trench and the second trench.

7. The method of claim 1 , wherein forming the first cavity under the first trench and the second cavity under the second trench comprises using an anisotropic crystallographic etching process.

8. The method of claim 1 , wherein forming the capping layer comprises forming a single continuous capping layer.

9. The method of claim 1 , wherein forming the capping layer comprises vapor depositing or spin coating the capping layer.

10. The method of claim 1 , wherein forming the capping layer comprises depositing the capping layer as a semi solid and then baking and curing the capping layer.

11. The method of claim 1 , wherein the capping layer comprises an oxide material.

12. The method of claim 1 , wherein the substrate comprises silicon.

13. The method of claim 1 , further comprising forming a back side conductive layer on the substrate.

14. A method of forming an electronic device, the method comprising:
forming a first trench and a second trench in a substrate; and
forming a first edge/tip and a second edge/tip by forming a first cavity under the first trench and a second cavity under the second trench, wherein the first cavity intersects with the second cavity to form the first edge/tip and the second edge/tip, wherein the first edge/tip is opposite the second edge/tip, and wherein the first edge/tip and the second edge/tip form part of a first field emission device;
before forming the first edge/tip and the second edge/tip, forming first isolation liner on sidewalls of the first trench and a second isolation liner on sidewalls of the second trench;
forming a capping layer over and sealing the first trench and the second trench;
forming a contact over the substrate and through the capping layer after forming the first cavity under the first trench and the second cavity under the second trench; and
forming a third edge/tip in a central bottom portion of the first cavity.

15. The method of claim 14 , further comprising forming a fourth edge/tip in a central bottom portion of the second cavity.

16. The method of claim 15 , wherein the fourth edge/tip is smaller than the second edge/tip.

17. The method of claim 14 , wherein the third edge/tip is smaller than the second edge/tip.

18. The method of claim 14 , wherein the first edge/tip is above the second edge/tip.

19. The method of claim 14 , wherein the capping layer completely seals the first trench and the second trench.

20. The method of claim 14 , wherein the capping layer is structurally coupled to the first edge/tip.

Assignees

• Infineon Technologies Ag

Inventors

• Dehe Alfons
• Sojka Damian
• Schmenn Andre
• Ahrens Carsten

Classifications

• H10P95/08

  Planarisation of organic insulating materials · CPC title

• H10P50/286

  of organic materials · CPC title

• H10P50/282

  of inorganic materials · CPC title

• H10P50/73

  using masks for insulating materials · CPC title

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title