Multi-layer ceramic capacitor

US10504650B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10504650-B2
Application numberUS-201615745693-A
CountryUS
Kind codeB2
Filing dateJun 16, 2016
Priority dateJul 17, 2015
Publication dateDec 10, 2019
Grant dateDec 10, 2019

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Abstract

Official abstract text for this publication.

A multi-layer ceramic capacitor is disclosed. In an embodiment the dielectric composition includes a perovskite crystal structure containing at least Bi, Na, Sr and Ti, wherein the dielectric composition includes a low-Bi phase in which a Bi concentration is no greater than 0.8 times the mean Bi concentration in the dielectric composition as a whole.

First claim

Opening claim text (preview).

The invention claimed is: 1. A dielectric composition comprising: a perovskite crystal structure containing at least Bi, Na, Sr and Ti, wherein the dielectric composition includes a low-Bi phase in which a Bi concentration is not greater than 0.8 times a mean Bi concentration in the dielectric composition as a whole. 2. The dielectric composition according to claim 1 , wherein 0<α≤0.150, where α is a surface area proportion of the low-Bi phase in a cross section of the dielectric composition with respect to the whole of a cross section. 3. The dielectric composition according to claim 1 , wherein 0.125≤β≤2.000, where β is a molar ratio of Bi with respect to Sr in the dielectric composition. 4. The dielectric composition according to claim 1 , further comprising at least one element selected from the group consisting of La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Yb, Ba, Ca, Mg and Zn. 5. The dielectric composition according to claim 4 , wherein the one element is between 1 molar part and 15 molar parts, taking a Ti content of the dielectric composition as 100 molar parts. 6. A dielectric element comprising: the dielectric composition according to claim 1 . 7. An electronic component comprising: a dielectric layer comprising the dielectric composition according to claim 1 . 8. A laminated electronic component comprising: a laminated portion formed by alternately laminating an internal electrode layer and a dielectric layer comprising the dielectric composition according to claim 1 . 9. A laminated ceramic capacitor comprising: the laminated electronic component according to claim 8 , wherein internal electrode layers are stacked such that end surfaces thereof are alternately exposed at surfaces of two opposing ends of the laminated electronic component. 10. The laminated ceramic capacitor according to claim 9 , wherein the internal electrode layers comprise Cu. 11. The laminated ceramic capacitor according to claim 9 , wherein the internal electrode layers comprise a Cu alloy. 12. The laminated ceramic capacitor according to claim 11 , wherein the Cu alloy comprises a Cu content of at least 95 wt %, taking the Cu alloy as 100 wt %. 13. The laminated ceramic capacitor according to claim 9 , further comprising a pair of external electrodes located at both ends of the laminated electronic component and connected to exposed end surfaces of the internal electrode layers. 14. The Laminated ceramic capacitor according to claim 13 , wherein the external electrodes comprise Cu. 15. A method for providing a laminated ceramic capacitor, the method comprising: providing a dielectric starting material from powders of bismuth oxide (Bi 2 O 3 ), sodium carbonate (Na 2 CO 3 ), strontium carbonate (SrCO 3 ) and titanium oxide (TiO 2 ); preparing a green chip using a sheet method or a printing method employing a paste for dielectric layers and a paste for internal electrodes, wherein the paste for the dielectric layers is an organic paint comprising a mixture of the dielectric starting material and an organic vehicle or wherein the paste for the dielectric layers is an aqueous paint comprising a mixture of the dielectric starting material and an aqueous vehicle; performing a debinding treatment on the green chip; baking the green chip thereby forming a main body; printing or transcribing external electrodes on the main body; and baking the main body comprising a dielectric composition, wherein the dielectric starting material is weighed out such that the dielectric composition has a perovskite crystal structure containing at least Bi, Na, Sr and Ti, and wherein the dielectric composition includes a low-Bi phase in which a Bi concentration is not greater than 0.8 times a mean Bi concentration in the dielectric composition as a whole. 16. The method according to claim 15 , further comprising: preparing the paste for the internal electrodes by mixing a conductive material comprising Au, Pt, Ag, Ag-Pd alloy, Cu or Ni, or various types of oxide which form the conductive material after baking, or organometallic compounds, or resinates with the organic vehicle; and preparing a paste for the external electrodes in the same way as the paste for the internal electrodes. 17. The method according to claim 15 , wherein the dielectric starting material further comprises a powder selected from barium carbonate (BaCO 3 ), calcium carbonate (CaCO 3 ), magnesium carbonate (MgCO 3 ), zinc oxide (ZnO), lanthanum hydroxide (La(OH) 3 ), neodymium oxide (Nd 2 O 3 ), samarium oxide (Sm 2 O 3 ) or gadolinium oxide (Gd 2 O 3 ).

Assignees

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Classifications

  • ceramics · CPC title

  • using additives specially adapted for forming the products {, e.g.. binder binders} · CPC title

  • perovskite-type (ABO3) · CPC title

  • Hydrogen containing atmosphere · CPC title

  • H01G4/1218Primary

    based on titanium oxides or titanates (H01G4/1245 takes precedence) · CPC title

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What does patent US10504650B2 cover?
A multi-layer ceramic capacitor is disclosed. In an embodiment the dielectric composition includes a perovskite crystal structure containing at least Bi, Na, Sr and Ti, wherein the dielectric composition includes a low-Bi phase in which a Bi concentration is no greater than 0.8 times the mean Bi concentration in the dielectric composition as a whole.
Who is the assignee on this patent?
Tdk Electronics Ag
What technology area does this patent fall under?
Primary CPC classification H01G4/1218. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 10 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).