Secure interaction method and device

US10499248B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10499248-B2
Application numberUS-201715435507-A
CountryUS
Kind codeB2
Filing dateFeb 17, 2017
Priority dateAug 21, 2014
Publication dateDec 3, 2019
Grant dateDec 3, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A secure interaction method includes receiving, by a processor, a secure processing request sent by an application program, where the application program operates in a normal mode, and the processor operates in the normal mode when receiving the secure processing request, switching, by the processor, from the normal mode to a secure mode according to the secure processing request, reading, by the processor operating in the secure mode, data information into a memory operating in the secure mode, where the data information is data that the processor operating in the secure mode generates after parsing the secure processing request, and controlling, by the processor operating in the secure mode, an accessed device to operate according to the data information stored in the memory operating in the secure mode.

First claim

Opening claim text (preview).

What is claimed is: 1. A secure interaction method, implemented by a secure interaction device comprising memory operating in a normal mode and memory operating in a secure mode, wherein the secure interaction method comprises: receiving, by a processor, a secure processing request from an application program, wherein the application program is comprised in the memory operating in the normal mode and operates in the normal mode, and wherein the processor operates in the normal mode when receiving the secure processing request; switching, by the processor, from the normal mode to the secure mode when receiving the secure processing request; reading, by the processor operating in the secure mode, data information into the memory operating in the secure mode, wherein the data information is data that the processor operating in the secure mode generates after parsing the secure processing request; and controlling, by the processor operating in the secure mode, an accessed device to operate according to the data information stored in the memory operating in the secure mode, wherein the accessed device operates in the normal mode, wherein the accessed device responds to control of the processor when the processor operates in the secure mode, wherein the accessed device operates after being invoked by the application program, wherein driver code for driving the application program and driver code for driving the accessed device operate in the normal mode, wherein the secure mode and the normal mode are two mutually isolated running environments, wherein the processor, when operating in the normal mode, cannot access the memory operating in the secure mode, and wherein the processor, when operating in the secure mode, can access the application program operating in the normal mode. 2. The secure interaction method of claim 1 , wherein after switching from the normal mode to the secure mode, the secure interaction method further comprises: reading, by the processor operating in the secure mode, a security indicator from the memory operating in the secure mode; and notifying, according to the security indicator by the processor operating in the secure mode, a user that a current environment is in a secure state. 3. The secure interaction method of claim 2 , wherein notifying the user that the current environment is in the secure state comprises controlling, according to the security indicator by the processor operating in the secure mode, a security indication device to operate, wherein the security indication device operates in the secure mode, and wherein the security indication device responds to control of the processor only when the processor operates in the secure mode. 4. The secure interaction method of claim 2 , wherein notifying the user that the current environment is in the secure state comprises controlling, by the processor operating in the secure mode, a display to display the security indicator read from the memory operating in the secure mode, wherein the display operates in the normal mode, and wherein the display responds to control of the processor only when the processor operates in the secure mode. 5. The secure interaction method of claim 1 , wherein reading the data information into the memory operating in the secure mode comprises reading, by the processor operating in the secure mode, frame buffer information into the memory operating in the secure mode, wherein the frame buffer information is obtained, by the processor operating in the secure mode, from an interface provided by a frame buffer device, and wherein the frame buffer device operates in the normal mode. 6. The secure interaction method of claim 5 , wherein the accessed device is a display, and wherein controlling the accessed device to operate according to the data information stored in the memory operating in the secure mode comprises controlling, by the processor operating in the secure mode, the display to display the frame buffer information read from the memory operating in the secure mode, wherein the display operates in the normal mode, and wherein the display responds to control of the processor only when the processor operates in the secure mode. 7. The secure interaction method of claim 6 , wherein controlling the display to display the frame buffer information read from the memory operating in the secure mode comprises controlling, by the processor operating in the secure mode, the display to display a foreground layer and a background layer, wherein the frame buffer information is displayed at the foreground layer, wherein a background is displayed at the background layer, and wherein the foreground layer and the background layer are displayed in different colors. 8. The secure interaction method of claim 1 , wherein reading the data information into the memory operating in the secure mode comprises: obtaining, by the processor operating in the secure mode, user data entered into an input device by a user, wherein the input device operates in the normal mode; performing, by the processor operating in the secure mode, verification processing on the user data to obtain result data; and reading, by the processor operating in the secure mode, the result data into the memory operating in the secure mode. 9. The secure interaction method of claim 8 , wherein the accessed device is a display, and wherein controlling the accessed device to operate according to the data information stored in the memory operating in the secure mode comprises controlling, by the processor operating in the secure mode, the display to display the result data read from the memory operating in the secure mode, wherein the display operates in the normal mode, and wherein the display responds to control of the processor only when the processor operates in the secure mode. 10. The secure interaction method of claim 1 , wherein before receiving the secure processing request from the application program, the secure interaction method further comprises: setting, by the processor, the accessed device to accessible by the processor operating in the secure mode; and loading, by the processor, an operating system to the memory operating in the normal mode such that driver code starts and executes the application program operating in the normal mode. 11. A secure interaction device, comprising: a processor; a memory coupled to the processor, wherein the memory comprises memory operating in a normal mode and memory operating in a secure mode; and an accessed device coupled to the processor, wherein the processor is configured to: receive a secure processing request from an application program, wherein the application program is comprised in the memory operating in the normal mode and operates in the normal mode, and wherein the processor operates in the normal mode when receiving the secure processing request; switch from the normal mode to the secure mode when receiving the secure processing request; read data information into the memory operating in the secure mode, wherein the data information is data that the processor operating in the secure mode generates after parsing the secure processing request, and wherein the processor operates in the secure mode; and control the accessed device to operate according to the data information stored in the memory operating in the secure mode, wherein the accessed device operates in the normal mode, wherein the processor operates in the secure mode, wherein the accessed device responds to control of the processor when the processor operates in the secure mode, wherein the accessed device operates after being invoked by the application program, wherein driver code for driving the application program and

Assignees

Inventors

Classifications

  • H04W12/08Primary

    Access security · CPC title

  • by securing the transmission between two devices or processes · CPC title

  • output devices, e.g. displays or monitors · CPC title

  • operating in dual or compartmented mode, i.e. at least one secure mode · CPC title

  • Protecting access to data via a platform, e.g. using keys or access control rules · CPC title

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Frequently asked questions

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What does patent US10499248B2 cover?
A secure interaction method includes receiving, by a processor, a secure processing request sent by an application program, where the application program operates in a normal mode, and the processor operates in the normal mode when receiving the secure processing request, switching, by the processor, from the normal mode to a secure mode according to the secure processing request, reading, by t…
Who is the assignee on this patent?
Huawei Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification H04W12/08. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 03 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).