Auto-tuned ramp generator

US10498316B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10498316-B2
Application numberUS-201815873270-A
CountryUS
Kind codeB2
Filing dateJan 17, 2018
Priority dateJan 17, 2018
Publication dateDec 3, 2019
Grant dateDec 3, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An auto-tuned ramp generator and a method for generating a sawtooth signal are provided. In the method and apparatus, a sawtooth signal is compared to a first reference voltage and a second reference voltage. In response to determining that the sawtooth signal does not exceed the first reference voltage, the voltage level of the sawtooth signal is increased. In response to determining that the sawtooth signal exceeds the second reference voltage, the voltage level of the sawtooth signal is decreased. The voltage level the sawtooth signal is retained if the sawtooth signal remains between the first and second reference voltages.

First claim

Opening claim text (preview).

The invention claimed is: 1. A sawtooth signal generator, comprising: a sawtooth signal generation stage including a current source, the sawtooth signal generation stage configured to: receive a control signal; and generate a sawtooth signal based on the control signal, the sawtooth signal having a peak voltage and a minimum voltage; a first comparator configured to: receive a first reference voltage, the first reference voltage being greater than the minimum voltage; receive the sawtooth signal; compare the peak voltage of the sawtooth signal with the first reference voltage; and output a first comparison signal that is asserted when the peak voltage of the sawtooth signal exceeds the first reference voltage and deasserted when the peak voltage of the sawtooth signal does not exceed the first reference voltage; a second comparator configured to: receive a second reference voltage, the second reference voltage being greater than the first reference voltage; receive the sawtooth signal; compare the peak voltage of the sawtooth signal with the second reference voltage; and output a second comparison signal that is asserted when the peak voltage of the sawtooth signal exceeds the second reference voltage and deasserted when the peak voltage of the sawtooth signal does not exceed the second reference voltage; control logic configured to: receive the first and second comparison signals; determine whether the first comparison signal is deasserted; in response to determining that the first comparison signal is deasserted, output the control signal to the sawtooth signal generation stage to increase a slope of the sawtooth signal using the current source; determine whether the second comparison signal is asserted; and in response to determining that the second comparison signal is asserted, output the control signal to the sawtooth signal generation stage to decrease the slope of the sawtooth signal using the current source; and the sawtooth signal generation stage further configured to: in response to the control signal output from the control logic, increasing or decreasing the current source to output the peak voltage of the sawtooth signal between the first reference voltage and the second reference voltage. 2. The sawtooth signal generator of claim 1 , wherein the sawtooth signal generation stage includes: the current source having a control terminal configured to receive the control signal, an anode coupled to a voltage supply node and a cathode coupled a sawtooth signal output node; a capacitance having a first side coupled to the output of the sawtooth signal output node and a second side coupled to a reference node; and a switch having a control terminal configured to receive a reset signal, a first conduction terminal coupled to the sawtooth signal output node, and a second conduction terminal coupled to the reference node. 3. The sawtooth signal generator of claim 2 , wherein the current source is configured to: receive the control signal; and adjust an output current provided at the cathode based on the control signal. 4. The sawtooth signal generator of claim 2 , wherein the control logic is configured to: receive a clock signal; and output the reset signal based on the clock signal, the reset signal when activated causes the switch to close and reset the sawtooth signal to a reference voltage of the reference node. 5. The sawtooth signal generator of claim 1 , wherein the control logic is configured to: determine that the first comparison signal is asserted and the second comparison signal is deasserted; and in response to determining that the first comparison signal is asserted and the second comparison signal is deasserted, output the control signal commanding the sawtooth signal generation stage to retain the slope of the sawtooth signal. 6. The sawtooth signal generator of claim 1 , wherein increasing the slope of the sawtooth signal increases the peak voltage of the sawtooth signal and decreasing the slope of the sawtooth signal decreases the peak voltage of the sawtooth signal. 7. A controller for a converter, comprising: a switching stage configured to: receive a feedback voltage indicative of an output voltage of the converter, and a sawtooth signal, the sawtooth signal having a peak voltage and a minimum voltage; generate a control signal based on the feedback voltage and the sawtooth signal; and output the control signal for driving the converter; and a sawtooth signal generator configured to: receive a first reference voltage and a second reference voltage, the first reference voltage being greater than the minimum voltage and the second reference voltage being greater than the first reference voltage; determine whether the peak voltage of the sawtooth signal is less than the first reference voltage or greater than the second reference voltage; in response to determining the peak voltage is below the first reference voltage, increase a current source to output the peak voltage of the sawtooth signal between the first reference voltage and the second reference voltage; and in response to determining the peak voltage is greater than the second reference voltage, decrease the current source to output the peak voltage of the sawtooth signal between the first reference voltage and the second reference voltage. 8. The controller of claim 7 , wherein the sawtooth signal generator is configured to: receive a clock signal for operating the converter; and cause a voltage level of the sawtooth signal to be reset in response to the clock signal. 9. The controller of claim 8 , wherein the sawtooth signal generator is configured to determine whether the voltage level of the sawtooth signal is below the first reference voltage or greater than the second reference voltage prior to causing the voltage level of the sawtooth signal to be reset. 10. The controller of claim 7 , wherein the current source has a control terminal, an anode coupled to a voltage supply node, and a cathode coupled to a sawtooth signal output node, wherein the sawtooth signal generator further includes: a capacitance having a first side coupled to the sawtooth signal output node, and a second side coupled to a reference node; and a switch having a control terminal for receiving a reset signal, a first conduction terminal coupled to the sawtooth signal output node, and a second conduction terminal coupled to the reference node. 11. The controller of claim 10 , wherein the switch is configured to transition to an electrically conductive state in response to assertion of the reset signal to reset the sawtooth signal to a reference voltage level. 12. A method, comprising: receiving a sawtooth signal from a sawtooth signal generation stage; maintaining a peak voltage of the sawtooth signal between a first reference voltage and a second reference voltage, the sawtooth signal having a minimum voltage, the first reference voltage being greater than the minimum voltage, the maintaining including: comparing, by a first comparator, the sawtooth signal to the first reference voltage; outputting a first control signal in response to the sawtooth signal being less than the first reference voltage; comparing, by a second comparator, the sawtooth signal to the second reference voltage; outputting a second control signal in response to the sawtooth signal being greater than the second reference voltage; increasing the peak voltage in response to the first control signal; and decreasing the peak voltage in response to the second control signal. 13. The method of claim 12 , comprising: supplying, by a current source

Assignees

Inventors

Classifications

  • H03K4/90Primary

    Linearisation of ramp (modifying slopes of pulses H03K6/04; scanning distortion correction for television receivers H04N3/23); Synchronisation of pulses · CPC title

  • the starting point of the flyback period being determined by the amplitude of the voltage across the capacitor, e.g. by a comparator · CPC title

  • by the use of differential amplifiers or comparators, with internal or external positive feedback · CPC title

  • Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature {(to maintain energy constant H03K3/015)} · CPC title

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What does patent US10498316B2 cover?
An auto-tuned ramp generator and a method for generating a sawtooth signal are provided. In the method and apparatus, a sawtooth signal is compared to a first reference voltage and a second reference voltage. In response to determining that the sawtooth signal does not exceed the first reference voltage, the voltage level of the sawtooth signal is increased. In response to determining that the …
Who is the assignee on this patent?
St Microelectronics Srl
What technology area does this patent fall under?
Primary CPC classification H03K4/90. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 03 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).