Motor control device

US10498282B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10498282-B2
Application numberUS-201816185716-A
CountryUS
Kind codeB2
Filing dateNov 9, 2018
Priority dateNov 16, 2017
Publication dateDec 3, 2019
Grant dateDec 3, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A common mode noise reduction section performs a first noise reduction process in a first system, a second noise reduction process in a second system and a third noise reduction process in the case where the two systems have a phase, a current for which that flows through a stray capacitance is not canceled out in at least one PWM cycle in a current control cycle after the first noise reduction process is performed and the second noise reduction process is performed. The third noise reduction process includes shifting a PWM count for each phase in the first system by a first predetermined amount and shifting a PWM count for each phase in the second system by a second predetermined amount such that the currents for such a phase which flow through the stray capacitances in the two systems cancel out each other in the relevant PWM cycle.

First claim

Opening claim text (preview).

What is claimed is: 1. A motor control device that controls an electric motor that has motor coils for three phases in two systems including a first system and a second system, the motor control device comprising: a pulse width modulation (PWM) count computation unit that computes a PWM count for each phase in each system in each current control cycle that includes a plurality of PWM cycles; a PWM count setting unit that sets the PWM count for each phase in each system in a current control cycle as a PWM count in each PWM cycle in the relevant current control cycle for the corresponding phase in the corresponding system; and a common mode noise reduction unit, wherein the common mode noise reduction unit includes a first reduction unit that performs a first noise reduction process such that, in the first system, a current that flows through a stray capacitance because of an output voltage for one phase is canceled out with a current that flows through the stray capacitance because of an output voltage for at least one of the two other phases in at least one PWM cycle in the current control cycle, the first noise reduction process including changing a PWM count in a PWM cycle for at least one of the two other phases, a second reduction unit that performs a second noise reduction process such that, in the second system, a current that flows through a stray capacitance because of an output voltage for one phase is canceled out with a current that flows through the stray capacitance because of an output voltage for at least one of the two other phases in at least one PWM cycle in the current control cycle, the second noise reduction process including changing a PWM count in a PWM cycle for at least one of the two other phases, and a third reduction unit that performs a third noise reduction process in the case where the two systems have a phase, a current for which that flows through a stray capacitance is not canceled out in at least one PWM cycle in the current control cycle after the first noise reduction process is performed by the first reduction unit and the second noise reduction process is performed by the second reduction unit, the third noise reduction process including shifting a PWM count for each phase in the first system by a first predetermined amount and shifting a PWM count for each phase in the second system by a second predetermined amount such that the currents for such a phase which flow through the stray capacitances in the two systems cancel out each other in the relevant PWM cycle. 2. The motor control device according to claim 1 , wherein the first reduction unit includes a first change unit that changes a PWM count in a PWM cycle such that a current that flows through a stray capacitance because of an output voltage for a first phase, which is one of the phases in the first system, is canceled out with a current that flows through the stray capacitance because of an output voltage for a second phase, which is one of the two other phases, in half a predetermined number of PWM cycles in the current control cycle, and such that the current that flows through the stray capacitance because of the output voltage for the first phase is canceled out with a current that flows through the stray capacitance because of an output voltage for a third phase, which is the other of the two other phases, in the other half of the predetermined number of PWM cycles in the current control cycle, a second change unit that changes a PWM count in a PWM cycle such that the current that flows through the stray capacitance because of the output voltage for the first phase, which is the one of the phases in the first system, is canceled out with the current that flows through the stray capacitance because of the output voltage for the second phase, which is the one of the two other phases, in half the predetermined number of PWM cycles in the current control cycle, and such that the current that flows through the stray capacitance because of the output voltage for the second phase is canceled out with the current that flows through the stray capacitance because of the output voltage for the third phase, which is the other of the two other phases, in the other half of the predetermined number of PWM cycles in the current control cycle, and a first selection unit that selects one of the first change unit and the second change unit as a change unit in accordance with a predetermined determination criterion in each current control cycle, the change unit changing a PWM count in a PWM cycle. 3. The motor control device according to claim 2 , wherein the second reduction unit includes a third change unit that changes a PWM count in a PWM cycle such that a current that flows through a stray capacitance because of an output voltage for a fourth phase, which is one of the phases in the second system, is canceled out with a current that flows through the stray capacitance because of an output voltage for a fifth phase, which is one of the two other phases, in half a predetermined number of PWM cycles in the current control cycle, and such that the current that flows through the stray capacitance because of the output voltage for the fourth phase is canceled out with a current that flows through the stray capacitance because of an output voltage for a sixth phase, which is the other of the two other phases, in the other half of the predetermined number of PWM cycles in the current control cycle, a fourth change unit that changes a PWM count in a PWM cycle such that the current that flows through the stray capacitance because of the output voltage for the fourth phase, which is the one of the phases in the second system, is canceled out with the current that flows through the stray capacitance because of the output voltage for the fifth phase, which is the one of the two other phases, in half the predetermined number of PWM cycles in the current control cycle, and such that the current that flows through the stray capacitance because of the output voltage for the fifth phase is canceled out with the current that flows through the stray capacitance because of the output voltage for the sixth phase, which is the other of the two other phases, in the other half of the predetermined number of PWM cycles in the current control cycle, and a second selection unit that selects one of the third change unit and the fourth change unit as a change unit in accordance with a predetermined determination criterion in each current control cycle, the change unit changing a PWM count in a PWM cycle.

Assignees

Inventors

Classifications

  • wherein the PWM mode is adapted on the running conditions of the motor, e.g. the switching frequency · CPC title

  • H02P21/14Primary

    Estimation or adaptation of machine parameters, e.g. flux, current or voltage · CPC title

  • by pulse-width modulation · CPC title

  • with automatic control of output voltage or current · CPC title

  • Current control, e.g. using a current control loop · CPC title

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What does patent US10498282B2 cover?
A common mode noise reduction section performs a first noise reduction process in a first system, a second noise reduction process in a second system and a third noise reduction process in the case where the two systems have a phase, a current for which that flows through a stray capacitance is not canceled out in at least one PWM cycle in a current control cycle after the first noise reduction…
Who is the assignee on this patent?
Jtekt Corp
What technology area does this patent fall under?
Primary CPC classification H02P21/14. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 03 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).