Gate driver

Patent metadata

Field	Value
Publication number	US-10498212-B2
Application number	US-201715662583-A
Country	US
Kind code	B2
Filing date	Jul 28, 2017
Priority date	May 26, 2017
Publication date	Dec 3, 2019
Grant date	Dec 3, 2019

Abstract

A gate drive circuit arranged to receive an input signal and provide an output signal to drive a gate of a transistor is presented. The gate drive circuit comprises a filter circuit arranged to attenuate a frequency band from the input signal when deriving the output signal from the input signal. The filter circuit contains programmable resistive elements, comprising: a first programmable resistive element arranged to adjust a low frequency gain and bandwidth of the gate drive circuit; a second programmable resistive element arranged to adjust a high frequency gain of the gate drive circuit; and a pair of programmable resistive elements arranged to adjust a driving gain of the gate drive circuit. A method of receiving an input signal and deriving an output signal from an input signal is also presented. The step of deriving an output signal comprises attenuating a frequency band from the input signal.

First claim

What is claimed is:

1. A gate drive circuit arranged to receive an input signal and provide an output signal to drive a gate of a transistor, wherein the output signal is derived from the input signal; and comprising a filter circuit arranged to attenuate a frequency band from the input signal when deriving the output signal from the input signal, wherein the frequency band is a frequency region where an overshoot, an undershoot or an oscillatory waveform is generated during operation.

2. The gate drive circuit of claim 1 , wherein the output signal is suitable for switching the transistor between a first state and a second state.

3. The gate drive circuit of claim 1 , wherein the filter circuit comprises a resonant circuit.

4. The gate drive circuit of claim 1 , wherein the filter circuit comprises a plurality of programmable resistive elements, comprising: a first programmable resistive element arranged to adjust a low frequency gain and bandwidth of the gate drive circuit; a second programmable resistive element arranged to adjust a high frequency gain of the gate drive circuit; and a pair of programmable resistive elements arranged to adjust a driving gain of the gate drive circuit.

5. The gate drive circuit of claim 4 , wherein the high frequency gain is at a higher frequency than the low frequency gain.

6. The gate drive circuit of claim 5 , wherein frequency regions defined by the high and low frequency gains do not overlap.

7. The gate drive circuit of claim 5 , wherein one more of the programmable resistive elements comprises a plurality of resistive elements that are coupled to each other and wherein each resistive element comprises a transmission gate coupled to a resistor.

8. The gate drive circuit of claim 4 , wherein one or more of the programmable resistive elements comprises a current-blocking switch arranged to limit a DC current flow when the output signal is in a high state or a low state.

9. The gate drive circuit of claim 3 , wherein the resonant circuit comprises an inductor and a capacitor, wherein the capacitor may be a programmable capacitor.

10. The gate drive circuit of claim 1 , wherein the filter circuit comprises a first stage arranged to modify the frequency spectrum of the input signal in the derivation of the output signal; and a second stage arranged to provide a driving gain sufficient to switch the transistor from a first state to a second state.

11. The gate drive circuit of claim 10 , wherein the first stage comprises a resonant circuit.

12. The gate drive circuit of claim 1 , wherein the input signal is a digital control signal.

13. A DC-DC converter comprising at least one transistor and at least one gate drive circuit associated with the transistor; said gate drive circuit arranged to receive an input signal and provide an output signal to drive a gate of the transistor, wherein the output signal is derived from the input signal; and comprising a filter circuit arranged to attenuate a frequency band from the input signal when deriving the output signal from the input signal, wherein the frequency band is a frequency region where an overshoot, an undershoot or an oscillatory waveform is generated during operation.

14. A method of driving a gate of a transistor, comprising receiving an input signal and deriving an output signal from said input signal; and wherein said deriving an output signal comprises attenuating a frequency band from the input signal, wherein the frequency band is a frequency region where an overshoot, an undershoot or an oscillatory waveform is generated during operation.

15. The method of claim 14 , wherein a filter circuit performs said attenuating said frequency band from said input signal.

16. The method of claim 15 , wherein the filter circuit comprises a plurality of programmable resistive elements, comprising: a first programmable resistive element arranged to adjust a low frequency gain and bandwidth of the gate drive circuit; a second programmable resistive element arranged to adjust a high frequency gain of the gate drive circuit; and a pair of programmable resistive elements arranged to adjust a driving gain of the gate drive circuit.

17. The method of claim 16 , wherein the high frequency gain is at a higher frequency than the low frequency gain.

18. The method of claim 17 , wherein frequency regions defined by the high and low frequency gains do not overlap.

19. The method of claim 16 , wherein one more of the programmable resistive elements comprises a plurality of resistive elements that are coupled to each other and wherein each resistive element comprises a transmission gate coupled to a resistor.

20. The method of claim 16 , wherein one or more of the programmable resistive elements comprises a current-blocking switch arranged to limit a DC current flow when the output signal is in a high state or a low state.

21. The method of claim 14 , wherein the filter circuit comprises a first stage arranged to modify the frequency spectrum of the input signal in the derivation of the output signal; and a second stage arranged to provide a driving gain sufficient to switch the transistor from a first state to a second state.

22. The method of claim 14 wherein the input signal is a digital control signal.

Assignees

• Dialog Semiconductor Uk Ltd

Inventors

• Chang Kevin
• Mercer Mark
• Jayo Michael

Classifications

• H03H2011/0488

  Notch or bandstop filters · CPC title

• H03K19/00361

  in field effect transistor circuits · CPC title

• H02M3/155

  using semiconductor devices only · CPC title

• H03K17/6872

  using complementary field-effect transistors · CPC title

• H03K2217/009

  Resonant driver circuits · CPC title