Pixel circuit and display panel
US-2024428730-A1 · Dec 26, 2024 · US
US10497310B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10497310-B2 |
| Application number | US-201815933474-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 23, 2018 |
| Priority date | Mar 23, 2018 |
| Publication date | Dec 3, 2019 |
| Grant date | Dec 3, 2019 |
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A pixel circuit for a display device includes a drive transistor configured to control an amount of current to a light-emitting device during an emission phase depending upon a voltage applied to a gate of the drive transistor; a second transistor connected to the gate of the drive transistor, wherein the second transistor is in an on state during a combined programming and compensation phase and in an off state during the emission phase, and when the second transistor is in an on state the drive transistor becomes diode-connected such that a gate and a second terminal of the drive transistor are connected through the second transistor; a third transistor connected to the second terminal of the drive transistor, wherein the third transistor is in an on state during the combined programming and compensation phase to permit a reference current to be applied through the drive transistor, and is in an off state during the emission phase to remove the reference current; and a capacitor having a first plate that is connected to the gate of the drive transistor and a second plate that is connectable to a data voltage during the combined programming and compensation phase. A threshold voltage and/or a carrier mobility of the drive transistor is compensated by application of the reference current during the combined programming and compensation phase.
Opening claim text (preview).
What is claimed is: 1. A pixel circuit for a display device that is operable in a combined programming and compensation phase, and operable in an emission phase, the pixel circuit comprising: a drive transistor configured to control an amount of current to a light-emitting device during the emission phase depending upon a voltage applied to a gate of the drive transistor; a second transistor connected to the gate of the drive transistor, wherein the second transistor is in an on state during the combined programming and compensation phase and in an off state during the emission phase, and when the second transistor is in the on state the drive transistor becomes diode-connected such that the gate and a second terminal of the drive transistor are connected through the second transistor; a third transistor connected to the second terminal of the drive transistor, wherein the third transistor is in an on state during the combined programming and compensation phase to permit a reference current to be applied through the drive transistor, and is in an off state during the emission phase to remove the reference current; and a capacitor having a first plate that is connected to the gate of the drive transistor and a second plate that is connectable to a data voltage (VDAT) during the combined programming and compensation phase; wherein a threshold voltage and/or a carrier mobility of the drive transistor are at least partially compensated by application of the reference current during the combined programming and compensation phase; and the pixel circuit further comprises: a fourth transistor that is connected to the second plate of the capacitor, wherein the fourth transistor is in an on state during the combined programming and compensation phase to apply the VDAT to the second plate of the capacitor, and the fourth transistor is in an off state during the emission phase to isolate the VDAT from the second plate of the capacitor; and a fifth transistor that is connectable to a voltage supply and is connected to the second plate of the capacitor, wherein the fifth transistor is in an off state during the combined programming and compensation phase to isolate the second plate of the capacitor from the voltage supply, and the fifth transistor is in the on state during the emission phase to connect the voltage supply to the second plate of the capacitor. 2. The pixel circuit of claim 1 , further comprising a sixth transistor that is in an off state during the combined programming and compensation phase to stop the flow of the reference current to the light-emitting device from the pixel circuit, and is in an on state during the emission phase to permit current that flows through the drive transistor to flow to the light-emitting device. 3. The pixel circuit of claim 2 , wherein the drive transistor and the second through fourth transistors are p-type transistors, and the fifth and sixth transistors are n-type transistors. 4. The pixel circuit of claim 2 , wherein the drive transistor and the second through fourth transistors are n-type transistors, and the fifth and sixth transistors are p-type transistors. 5. The pixel circuit of claim 2 , wherein the sixth transistor is connected between the second terminal of the drive transistor and an output to the light-emitting device. 6. The pixel circuit of claim 2 , wherein the sixth transistor is connected between the second terminal of the drive transistor and an input from a voltage supply. 7. The pixel circuit of claim 1 , wherein the drive transistor is connectable to a first voltage supply, and the fifth transistor is connectable to a reference second voltage supply; and wherein the fifth transistor is in the off state during the combined programming and compensation phase to isolate the second plate of the capacitor from the reference second voltage supply, and the fifth capacitor is in the on state during the emission phase to connect the reference second voltage supply to the second plate of the capacitor. 8. The pixel circuit of claim 1 , wherein the third transistor and the first transistor are configured for the reference current to flow to the light-emitting device during the combined programming and compensation to compensate for voltage variations of the light-emitting device. 9. The pixel circuit of claim 1 , wherein the drive transistor and the second through fifth transistors are all p-type transistors. 10. The pixel circuit of claim 1 , wherein the drive transistor and the second through fifth transistors are all n-type transistors. 11. The pixel circuit of claim 1 , wherein the light-emitting device is an organic light-emitting diode (OLED), a micro light-emitting diode (LED), or a quantum dot LED.
Compensation of drifts in the characteristics of light emitting or modulating elements · CPC title
Preventing or counteracting the effects of ageing · CPC title
The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes · CPC title
Precharge or discharge of pixel before applying new pixel voltage · CPC title
with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title
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