In-cell touch display panel

US10495928B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10495928-B2
Application numberUS-201715808867-A
CountryUS
Kind codeB2
Filing dateNov 9, 2017
Priority dateDec 29, 2016
Publication dateDec 3, 2019
Grant dateDec 3, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The in-cell touch display panel has a display area and a non-display area. Display IC bounding pads and touch pads are disposed in the non-display area. A touch electrode corresponds to more than one pixel structures. A touch sensing line is electrically connected to the touch electrode and one of the touch pads. A data line is electrically connected to a thin film transistor and one of the display pads. At least one of the display pads is disposed between two of the touch pads, and at least one of the touch pads is disposed between two of the display pads.

First claim

Opening claim text (preview).

What is claimed is: 1. An in-cell touch display panel having a display area and a non-display area, wherein the in-cell touch display panel comprises: a first substrate; a plurality of data lines disposed on the first substrate along a first direction; a plurality of gate lines disposed along a second direction, wherein an angle is formed between the first direction and the second direction; a plurality of touch sensing lines disposed on the first substrate and electrically insulated from the data lines and the gate lines; a plurality of pixel regions formed in the display area surrounded by the gate lines and the data lines intersecting with each other, wherein each of the pixel regions comprises a pixel structure, and each of the pixel structures comprises a pixel electrode; a common electrode comprising a plurality of touch electrodes, wherein each of the touch electrodes corresponds to more than one of the pixel electrodes, and each of the pixel electrodes corresponds to a sub-common electrode which is a part of the touch electrode; a plurality of thin film transistors (TFTs) formed in the pixel structures, wherein each of the thin film transistors comprises a gate, a source, a drain and a semiconductor layer; a second substrate, wherein a liquid crystal layer is formed between the first substrate and the second substrate; and a plurality of display pads and a plurality of touch pads, the display pads and the touch pads being disposed in the non-display area, wherein each of the touch electrodes is electrically connected to at least one of the touch sensing lines, and each of the touch sensing lines is electrically connected to one of the touch pads; each of the sources is electrically connected to one of the data lines, and each of the data lines is electrically connected to one of the display pads; and at least one of the display pads is disposed between two of the touch pads, and at least one of the touch pads is disposed between two of the display pads, wherein a number of the touch pads is less than a number of the display pads, the display pads and the touch pads are arranged as a plurality of rows, and one of the rows comprises at least part of the touch pads. 2. The in-cell touch display panel of claim 1 , wherein the data lines are parallel to the touch sensing lines in the display area, and the data lines are not overlapped with the touch sensing lines in the non-display area. 3. The in-cell touch display panel of claim 1 ; wherein the data lines are parallel to the touch sensing lines in the display area; and the data lines and the touch sensing lines are formed in a same metal layer in the display area. 4. The in-cell touch display panel of claim 1 , wherein at least two of the touch sensing lines are electrically connected to each other and to one of the touch pads through a conductive line. 5. The in-cell touch display panel of claim 1 , wherein the touch pads are disposed at a side of the display pads opposite to the display area. 6. The in-cell touch display panel of claim 1 , wherein the display pads are disposed at a side of the touch pads opposite to the display area. 7. The in-cell touch display panel of claim 1 , further comprising a driving circuit disposed in the non-display area and electrically connected to the display pads and the touch pads, wherein in a display period, the driving circuit transmits pixel data to the pixel electrodes through the data lines and the TFTs; and in a touch period, the driving circuit generates a touch sensing signal according to a voltage on one of the touch electrodes. 8. The in-cell touch display panel of claim 1 , further comprising: a first metal layer formed on the first substrate, wherein the first metal layer comprises the gates; a first insulation layer formed on the first metal layer; the semiconductor layer formed on the first insulation layer; a first transparent conductive layer formed on the first insulation layer, wherein the first transparent conductive layer comprises the pixel electrodes; a second metal layer formed on the semiconductor layer, wherein the second metal layer comprises the sources and the drains, the touch sensing lines and the data lines are formed in the second metal layer in the display area, and one the touch sensing lines is disposed between two of the data lines; a second insulation layer formed on the second metal layer and on the first transparent conductive layer, wherein the second insulation layer comprises a first contact hole to expose one of the touch sensing lines; a third insulation layer formed on the second insulation layer, and having a second contact hole corresponding to the first contact hole; and a second transparent conductive layer formed on the third insulation layer and is electrically connected to the one of the touch sensing lines through the second contact hole and the first contact hole, wherein the second transparent conductive layer comprises the sub-common electrodes. 9. An in-cell touch display panel having a display area and a non-display area, wherein the in-cell touch display panel comprises: a first substrate; a plurality of data lines disposed on the first substrate along a first direction; a plurality of gate lines disposed along a second direction, wherein an angle is formed between the first direction and the second direction; a plurality of touch sensing lines disposed on the first substrate and electrically insulated from the data lines and the gate lines; a plurality of pixel regions formed in the display area surrounded by the gate lines and the data lines intersecting with each other, wherein each of the pixel regions comprises a pixel structure, and each of the pixel structures comprises a pixel electrode; a common electrode comprising a plurality of touch electrodes, wherein each of the touch electrodes corresponds to more than one of the pixel electrodes, and each of the pixel electrodes corresponds to a sub-common electrode which is a part of the touch electrode; a plurality of thin film transistors (TFTs) formed in the pixel structures, wherein each of the thin film transistors comprises a gate, a source, a drain and a semiconductor layer; a second substrate, wherein a liquid crystal layer is formed between the first substrate and the second substrate; and a plurality of display pads and a plurality of touch pads, the display pads and the touch pads being disposed in the non-display area, wherein each of the touch electrodes is electrically connected to at least one of the touch sensing lines, and each of the touch sensing lines is electrically connected to one of the touch pads; each of the sources is electrically connected to one of the data lines, and each of the data lines is electrically connected to one of the display pads; and at least one of the display pads is disposed between two of the touch pads, and at least one of the touch pads is disposed between two of the display pads, wherein a number of the touch pads is less than a number of the display pads, the display pads and the touch pads are arranged as a plurality of rows, wherein a first row of the rows comprises a portion of the display pads, and a second row of the rows comprises a portion of the display pads and a portion of the touch pads. 10. The in-cell touch display panel of claim 9 , wherein the first row is disposed between the display area and the second row. 11. The in-cell touch display panel of claim 9 , wherein the second row is disposed between the display area and the first row.

Assignees

Inventors

Classifications

  • Wiring, e.g. gate line, drain line · CPC title

  • common or background · CPC title

  • Digitisers structurally integrated in a display · CPC title

  • Input devices, e.g. touch panels · CPC title

  • spacers regularly patterned on the cell subtrate, e.g. walls, pillars (G02F1/133377 takes precedence) · CPC title

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What does patent US10495928B2 cover?
The in-cell touch display panel has a display area and a non-display area. Display IC bounding pads and touch pads are disposed in the non-display area. A touch electrode corresponds to more than one pixel structures. A touch sensing line is electrically connected to the touch electrode and one of the touch pads. A data line is electrically connected to a thin film transistor and one of the dis…
Who is the assignee on this patent?
Hannstar Display Nanjing Corp, Hannstar Display Corp
What technology area does this patent fall under?
Primary CPC classification G06F3/044. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 03 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).