Continuous-time delta-sigma modulator

Patent metadata

Field	Value
Publication number	US-10491237-B1
Application number	US-201916242508-A
Country	US
Kind code	B1
Filing date	Jan 8, 2019
Priority date	Jun 14, 2018
Publication date	Nov 26, 2019
Grant date	Nov 26, 2019

Abstract

A continuous-time delta-sigma modulator includes a loop filter, a quantizer, a finite impulse response (FIR) filter, and a digital to analog converter. The loop filter integrates a difference between an input signal and a feedback signal. The quantizer quantizes a signal output from the loop filter to convert the quantized signal into a digital signal. The FIR filter performs an FIR filtering process on the digital signal output from the quantizer. The digital to analog converter converts a signal output from the FIR filter into an analog signal and outputs the converted analog signal as a feedback signal.

First claim

What is claimed is:

1. A continuous-time delta-sigma modulator, comprising:
a loop filter which integrates a difference between an input signal and a feedback signal;
a quantizer which quantizes a signal output from the loop filter to convert the quantized signal into a digital signal;
a finite impulse response (FIR) filter which performs a FIR filtering process on the digital signal output from the quantizer; and
a digital to analog converter which converts a signal output from the FIR filter into an analog signal and outputs the converted analog signal as a feedback signal,
wherein the loop filter is implemented by at least one Gm-C integrator, and
wherein the at least one Gm-C integrator includes:
a transconductor which generates differential output currents through a plus output terminal and a minus output terminal in accordance with a difference of input voltages input to a plus input terminal and a minus input terminal; and
first and second capacitors which receive the differential output current to charge charges and generate an integrated voltage.

2. The continuous-time delta-sigma modulator according to claim 1 , further comprising:
an adder which adds the difference between the modulator input signal and the feedback signal to output the added value to the loop filter.

3. The continuous-time delta-sigma modulator according to claim 1 , further comprising:
a chopper circuit which is located at a front-end or a rear-end of the transconductor and removes a low frequency noise of the Gm-C integrator.

4. The continuous-time delta-sigma modulator according to claim 3 , wherein the chopper circuit sets an aliasing error frequency component as a notch frequency of the FIR filter.

5. A loop circuit, comprising:
a transconductor which converts a difference of input voltages input to two differential input terminals(Vinp,Vinn) into a current and outputs the current;
first and second capacitors which accumulate charges by a current output from the transconductor; and
a chopper circuit which is located at a front-end or a rear-end of the transconductor and removes a low frequency noise.

Assignees

• Univ Korea Res & Bus Found

Inventors

• Kim Chulwoo
• Lim Chaekang

Classifications

• H03M3/464

  Details of the digital/analogue conversion in the feedback path · CPC title

• H03M3/406

  by the use of a pair of integrators forming a closed loop · CPC title

• H03M3/34

  by chopping · CPC title

• H03M3/504 Primary

  the final digital/analogue converter being constituted by a finite impulse response [FIR] filter, i.e. FIRDAC · CPC title

• H03M3/436

  characterised by the order of the loop filter, e.g. error feedback type · CPC title