Data driving apparatus, data processing apparatus and driving system for display panel

Patent metadata

Field	Value
Publication number	US-10490158-B2
Application number	US-201816221238-A
Country	US
Kind code	B2
Filing date	Dec 14, 2018
Priority date	Dec 21, 2017
Publication date	Nov 26, 2019
Grant date	Nov 26, 2019

Abstract

The present disclosure provides a technology indicating information different from each other by patterns of link data in a process of training links performed prior to transmitting image data.

First claim

What is claimed is:

1. A data driving apparatus comprising:
a data receiving part for training a communication clock according to received clock patterns, receiving, in accordance with said communication clock, at least one link data selected from multiple link data respectively including same or different information, training a data link in accordance with said at least one link data, receiving image data in accordance with the data link, and converting said image data to generate grayscale data for each sub-pixel; and
a data driving part for generating data voltage according to said grayscale data and driving each sub-pixel with said data voltage,
wherein said data receiving part converts the image data according to at least one information included in said at least one link data.

2. The data driving apparatus of claim 1 , wherein said at least one information includes information about an operation mode of a decoder used for a conversion of said image data.

3. The data driving apparatus of claim 1 , wherein said at least one information includes information about a limited run length code (LRLC) and said data receiving part decodes said image data according to said information about the LRLC.

4. The data driving apparatus of claim 1 , wherein said at least one information includes information about a maximum run length (MRL) and said data receiving part decodes said image data according to said information about the MRL.

5. The data driving apparatus of claim 1 , wherein at least two link data among said multiple link data respectively have different cycles of repeated patterns.

6. The data driving apparatus of claim 1 , wherein said at least one information includes information about a number of pairs of communication lines or a number of communication lines through which said image data is transmitted and said data receiving part converts said image data according to said number of pairs of communication lines or said number of communication lines.

7. The data driving apparatus of claim 1 , wherein said data receiving part trains said data links by performing an arrangement of said link data by a byte unit and by a pixel unit.

8. The data driving apparatus of claim 1 , wherein said at least one information includes information about a operation mode of a descrambler used for the conversion of said image data.

9. The data driving apparatus of claim 1 , being disposed in a chip-on-glass (COG) manner on a periphery of an active area of a panel where said sub-pixels are disposed.

10. The data driving apparatus of claim 1 , wherein said data receiving part receives configuration data in accordance with said data link and a range of said data voltage is larger than that of said configuration data voltage.

11. A data processing apparatus comprising:
a data transmitting part for transmitting clock patterns indicating a communication clock to a data driving apparatus driving sub-pixels, and synchronizing at least one link data selected from multiple link data respectively including same or different information with said communication clock to transmit the same to said data driving apparatus; and
a data processing part for encoding image data according to at least one information included in said at least one link data,
wherein said data transmitting part transmits said image data to said data driving apparatus where a data link is formed according to said at least one link data.

12. The data processing apparatus of claim 11 , wherein said data transmitting part transmits again said at least one link data after receiving a lock signal.

13. The data processing apparatus of claim 11 , wherein said data transmitting part scrambles said image data or encodes said image data with a limited run length code (LRLC).

14. The data processing apparatus of claim 11 , wherein said multiple link data differs from each other in a kind of symbol or a disposition of symbol.

15. A display driving system comprising:
a data processing apparatus for transmitting clock patterns indicating a communication clock, synchronizing at least one link data selected from multiple link data respectively including same or different information with said communication clock to transmit the same, and encoding image data according to at least one information included in said at least one link data; and
a data driving apparatus for training said communication clock according to said received clock patterns, receiving said at least one link data in accordance with said communication clock, training data link according to said at least one link data, receiving said image data in accordance with said data link, and converting said image data according to said at least one information included in said at least one link data to generate grayscale data for each sub-pixel.

Assignees

• Silicon Works Co Ltd

Inventors

• Kim Myung Yu
• Cho Hyun Pyo
• Kim Byung-Guk
• Jeon Hyun Kyu

Classifications

• H04N25/00

  Circuitry of solid-state image sensors [SSIS]; Control thereof · CPC title

• G09G5/006 Primary

  Details of the interface to the display terminal (specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04) · CPC title

• H03M7/6005

  Decoder aspects · CPC title

• G09G2320/0693

  Calibration of display systems · CPC title

• G09G5/008 Primary

  Clock recovery · CPC title