Pixel circuit and display device

Patent metadata

Field	Value
Publication number	US-10490136-B2
Application number	US-201816203645-A
Country	US
Kind code	B2
Filing date	Nov 29, 2018
Priority date	Apr 26, 2018
Publication date	Nov 26, 2019
Grant date	Nov 26, 2019

Abstract

A pixel circuit and a display device are provided. The pixel circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a driving transistor, a first capacitor and a second capacitor. A threshold voltage of the driving transistor is compensated through a cooperation of the transistors and the capacitors in a source following manner, such that a driving current generated by the driving transistor for driving a light emitting element to emit light is independent from the threshold voltage of the driving transistor itself. In addition, the driving transistor and the anode of the light emitting element are reset through the cooperation of the transistors, thereby avoiding from grabbing a different threshold voltage after a gray scale transition, thus avoiding afterimages and insufficient brightness of the first frame after the gray scale transition.

First claim

The invention claimed is:

1. A pixel circuit for driving a light emitting element, the pixel circuit comprising:
a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a driving transistor, a first capacitor and a second capacitor, wherein
a gate of the first transistor is supplied with a first driving signal, a first electrode of the first transistor is supplied with an anode voltage, and a second electrode of the first transistor is connected to a source of the driving transistor;
a gate of the second transistor is supplied with a second driving signal, a first electrode of the second transistor is supplied with a data voltage, and a second electrode of the second transistor is connected to the source of the driving transistor;
a gate of the third transistor is supplied with a third driving signal, a first electrode of the third transistor is connected to a second plate of the first capacitor, a second electrode of the third transistor is connected to a second plate of the second capacitor and a gate of the driving transistor, and a first plate of the first capacitor is supplied with a high level voltage;
a gate of the fourth transistor is supplied with a fourth driving signal, a first electrode of the fourth transistor is connected to the source of the driving transistor, and a second electrode of the fourth transistor is connected to a first plate of the second capacitor;
a gate of the fifth transistor is supplied with a fifth driving signal, a first electrode of the fifth transistor is supplied with a first low level voltage, and a second electrode of the fifth transistor is connected to the second plate of the second capacitor and the gate of the driving transistor; and
a gate of the sixth transistor is supplied with a sixth driving signal, a first electrode of the sixth transistor is supplied with a second low level voltage, a second electrode of the sixth transistor is connected to a drain of the driving transistor and an anode of the light emitting element, and a cathode of the light emitting element is supplied with a cathode voltage.

2. The pixel circuit according to claim 1 , wherein an effective level of the first driving signal and an effective level of the third driving signal have a same time sequence.

3. The pixel circuit according to claim 1 , wherein an effective level of the fifth driving signal and an effective level of the sixth driving signal have a same time sequence.

4. The pixel circuit according to claim 3 , wherein a driving process of the pixel circuit comprises an initialization phase, a threshold grabbing phase, a data writing phase and a light emitting phase, and wherein
in the initialization phase, the first transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor are driven to be turned on, and the second transistor is driven to be turned off, to drive the driving transistor to be turned on;
in the threshold grabbing phase, the fourth transistor, the fifth transistor and the sixth transistor are driven to be turned on, the first transistor, the second transistor and the third transistor are driven to be turned off, and the driving transistor remains in an on state;
in the data writing phase, the second transistor and the fourth transistor are driven to be turned on, the first transistor, the third transistor, the fifth transistor and the sixth transistor are driven to be turned off, to drive the driving transistor to be turned off; and
in the light emitting phase, the first transistor and the third transistor are driven to be turned on, the second transistor, the fourth transistor, the fifth transistor and the sixth transistor are driven to be turned off, to drive the driving transistor to be turned on.

5. The pixel circuit according to claim 3 , wherein the second low level voltage is supplied from an independent voltage terminal.

6. The pixel circuit according to claim 3 , wherein the second low level voltage is supplied to a terminal at which the second electrode of the fifth transistor, the second plate of the second capacitor and the gate of the driving transistor are connected with each other.

7. The pixel circuit according to claim 1 , wherein an effective level of the fourth driving signal and an effective level of the sixth driving signal have a same time sequence.

8. The pixel circuit according to claim 7 , wherein a driving process of the pixel circuit comprises an initialization phase, a threshold grabbing phase, a data writing phase and a light emitting phase, and wherein
in the initialization phase, the first transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor are driven to be turned on, and the second transistor is driven to be turned off, to drive the driving transistor to be turned on;
in the threshold grabbing phase, the fourth transistor, the fifth transistor and the sixth transistor are driven to be turned on, the first transistor, the second transistor and the third transistor are driven to be turned off, and the driving transistor remains in an on state;
in the data writing phase, the second transistor, the fourth transistor and the sixth transistor are driven to be turned on, the first transistor, the third transistor and the fifth transistor are driven to be turned off, to drive the driving transistor to be turned off; and
in the light emitting phase, the first transistor and the third transistor are driven to be turned on, and the second transistor, the fourth transistor, the fifth transistor and the sixth transistor are driven to be turned off, to drive the driving transistor to be turned on.

9. The pixel circuit according to claim 1 , wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor and the driving transistor are P-type transistors.

10. The pixel circuit according to claim 1 , wherein the high level voltage and the anode voltage are supplied from a same voltage terminal.

11. A display device comprising a pixel circuit, wherein the pixel circuit comprises:
a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a driving transistor, a first capacitor and a second capacitor, and wherein
a gate of the first transistor is supplied with a first driving signal, a first electrode of the first transistor is supplied with an anode voltage, and a second electrode of the first transistor is connected to a source of the driving transistor;
a gate of the second transistor is supplied with a second driving signal, a first electrode of the second transistor is supplied with a data voltage, and a second electrode of the second transistor is connected to the source of the driving transistor;
a gate of the third transistor is supplied with a third driving signal, a first electrode of the third transistor is connected to a second plate of the first capacitor, a second electrode of the third transistor is connected to a second plate of the second capacitor and a gate of the driving transistor, and a first plate of the first capacitor is supplied with a high level voltage;
a gate of the fourth transistor is supplied with a fourth driving signal, a first electrode of the fourth transistor is connected to the source of the driving transistor, and a second electrode of the fourth transistor is connected to a first plate of the second capacitor;
a gate of the fifth transistor is supplied with a fifth driving signal, a first electrode of the fifth transistor is supplied with a first low level voltage, and a second electrode of the fifth

Assignees

• Shanghai Tianma Am Oled Co Ltd

Inventors

• Zhu Renyuan
• Li Yue
• Xiang Dongxu
• Gao Yana
• Zhou Xingyao

Classifications

• G09G2300/0852

  being a dynamic memory with more than one capacitor · CPC title

• G09G2300/0439

  Pixel structures · CPC title

• G09G2310/0262

  The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes · CPC title

• G09G2310/0245

  Clearing or presetting the whole screen independently of waveforms, e.g. on power-on (G09G2310/063 takes precedence) · CPC title

• G09G2300/0819

  used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title