Magnetic memory

Patent metadata

Field	Value
Publication number	US-10483459-B2
Application number	US-201815914206-A
Country	US
Kind code	B2
Filing date	Mar 7, 2018
Priority date	Aug 8, 2017
Publication date	Nov 19, 2019
Grant date	Nov 19, 2019

Abstract

A magnetic memory according to an embodiment includes: a first conductive layer including a first to third regions arranged along a first direction, the second region being disposed between the first region and the third region; a second conductive layer including a fourth to sixth regions arranged along the first direction, the fifth region being disposed between the fourth and sixth regions; a third conductive layer electrically connected to the third and fourth regions; a first magnetoresistance device disposed to correspond to the second region, including a first magnetic layer, a second magnetic layer, and a first nonmagnetic layer; a second magnetoresistance device to correspond to the fifth region, including a third magnetic layer, a fourth magnetic layer, and a second nonmagnetic layer, a direction from the first region to the third region differing from a direction from the fourth region to the sixth region.

First claim

The invention claimed is:

1. A magnetic memory comprising:
a first terminal and a second terminal;
a first conductive layer including a first region, a second region, and a third region that are arranged along a first direction, the second region being disposed between the first region and the third region, and the first region being electrically connected to the first terminal;
a second conductive layer including a fourth region, a fifth region, and a sixth region that are arranged along the first direction, the fifth region being disposed between the fourth region and the sixth region, and the sixth region being electrically connected to the second terminal;
a third conductive layer electrically connected to the third region and the fourth region;
a first magnetoresistance device disposed to correspond to the second region, including a first magnetic layer that is separate from the second region along a second direction intersecting the first direction, a second magnetic layer disposed between the second region and the first magnetic layer and electrically connected to the second region, a first nonmagnetic layer disposed between the first magnetic layer and the second magnetic layer, and a third terminal electrically connected to the first magnetic layer;
a second magnetoresistance device disposed to correspond to the fifth region, including a third magnetic layer that is separate from the fifth region along the second direction, a fourth magnetic layer disposed between the fifth region and the third magnetic layer and electrically connected to the fifth region, a second nonmagnetic layer disposed between the third magnetic layer and the fourth magnetic layer, and a fourth terminal electrically connected to the third magnetic layer; and
a first circuit configured to flow a current between the first terminal and the second terminal through the first conductive layer, the third conductive layer, and the second conductive layer in a write operation,
a direction from the first region to the third region differing from a direction from the fourth region to the sixth region, and a direction from the second magnetic layer to the fourth magnetic layer intersecting a plane including the first direction and the second direction.

2. The magnetic memory according to claim 1 , wherein the first circuit applies a voltage to the third terminal and the fourth terminal in the write operation.

3. The magnetic memory according to claim 1 , further comprising a second circuit configured to apply a voltage to at least one of the first terminal and the second terminal and to perform a read operation based on a voltage difference between the third terminal and the fourth terminal.

4. The magnetic memory according to claim 1 , further comprising a fifth terminal electrically connected to the third conductive layer, and a second circuit configure to apply a voltage between the fifth terminal and the third terminal and between the fifth terminal and the fourth terminal and to perform a read operation based on a voltage difference between the third terminal and the fourth terminal.

5. The magnetic memory according to claim 1 , wherein one of the first magnetoresistance device and the second magnetoresistance device is set to be in a high-resistance state, and the other is set to be in a low-resistance state.

6. The magnetic memory according to claim 1 , further comprising a first magnetic-field-applying device configured to apply a biased magnetic field to the second magnetic layer, and a second magnetic-field-applying device configured to apply a biased magnetic field to the fourth magnetic layer.

7. The magnetic memory according to claim 6 , wherein:
the first magnetic layer and the second magnetic layer have a magnetization component that intersects the second direction, and the third magnetic layer and the fourth magnetic layer have a magnetization component that intersects the second direction;
the first magnetic-field-applying device includes a fifth magnetic layer disposed between the first magnetic layer and the third terminal and having a magnetization component that is parallel to the second direction; and
the second magnetic-field-applying device includes a sixth magnetic layer disposed between the third magnetic layer and the fourth terminal and having a magnetization component that is parallel to the second direction.

8. The magnetic memory according to claim 6 , wherein:
the first conductive layer includes a seventh region between the second region and the third region, and the second conductive layer includes a eighth region between the fifth region and the sixth region,
the first magnetic-field-applying device includes a fifth magnetic layer disposed to correspond to the seventh region, and
the second magnetic-field-applying device includes a sixth magnetic layer disposed to correspond to the eighth region.

9. The magnetic memory according to claim 1 , wherein the third conductive layer is electrically connected to the third region through a first contact, and to the fourth region through a second contact.

10. The magnetic memory according to claim 1 , further comprising: a first switch which is electrically connected to the first terminal, a second switch which is electrically connected to the third terminal, and a third switch which is electrically connected to the fourth terminal.

11. The magnetic memory according to claim 10 , wherein the first switch, the second switch, and the third switch are MOS transistors.

12. The magnetic memory according to claim 10 , further comprising: a fourth switch which is electrically connected to the second terminal.

Assignees

• Toshiba Kk

Inventors

• Sugiyama Hideyuki
• Ohsawa Yuichi
• Shirotori Satoshi
• Shimizu Mariko
• BUYANDALAI Altansargai
• Yoda Hiroaki

Classifications

• G11C11/1675

  Writing or programming circuits or methods · CPC title

• G11C11/161

  details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

• G11C11/1673 Primary

  Reading or sensing circuits or methods · CPC title

• G11C11/18

  using Hall-effect devices · CPC title

• H01L43/08 Primary

  Electricity · mapped topic