Semiconductor structure of interconnect and fabrication method thereof

Patent metadata

Field	Value
Publication number	US-10483162-B2
Application number	US-201815936766-A
Country	US
Kind code	B2
Filing date	Mar 27, 2018
Priority date	Mar 29, 2017
Publication date	Nov 19, 2019
Grant date	Nov 19, 2019

Abstract

A semiconductor structure and a fabrication method are provided. The fabrication method includes: providing a substrate; forming a dielectric layer with an opening on the substrate; forming a first barrier layer on sidewall and bottom surfaces of the opening, the first barrier layer being doped by manganese; and forming a metal interconnect on the first barrier layer, the metal interconnect being located within the opening.

First claim

What is claimed is:

1. A method of forming a semiconductor structure, comprising:
providing a substrate;
forming a dielectric layer with an opening on the substrate;

forming a first barrier layer on sidewall and bottom surfaces of the opening, wherein the first barrier layer is made of a material including tantalum nitride doped with manganese, the first barrier layer is formed by an atomic layer deposition process, and forming the first barrier layer comprises:
introducing a tantalum source gas to the substrate, a portion of the tantalum source gas being adsorbed on the substrate;
evacuating the tantalum source gas that is not adsorbed on the substrate;
introducing a manganese source gas to the substrate, a portion of the manganese source gas being adsorbed on the substrate;
evacuating the manganese source gas that is not adsorbed on the substrate;
introducing a nitrogen source gas to the substrate, a portion of the nitrogen source gas being adsorbed on the substrate; and
evacuating the nitrogen source gas that is not adsorbed on the substrate, wherein the atomic layer deposition process uses:
the tantalum source gas including C 10 H 30 N 5 Ta, with a flow rate in a range of approximately 500 standard ml/min˜1500 standard ml/min;
the manganese source gas including (C 5 H 5 ) 2 Mn, with a flow rate in a range of approximately 50 standard ml/min˜150 standard ml/min;
the nitrogen source gas including ammonia gas, with a flow rate in a range of approximately 500 standard ml/min˜2000 standard ml min;
a deposition temperature in a range of approximately 250° C.˜350° C.; and
a pressure in a reaction chamber in a range of approximately 2 Torr˜10 Torr; and
forming a metal interconnect on the first barrier layer, the metal interconnect being located within the opening.

2. The method according to claim 1 , wherein:
a thickness of the first barrier layer is in a range of approximately 15 Å to 50 Å.

3. The method according to claim 1 , wherein:
an atomic percentage concentration of manganese in the first barrier layer is in a range of 0.5% to 3%.

4. The method according to claim 1 , wherein:
the dielectric layer includes a single-layer structure; and
the dielectric layer is made of a low-K dielectric material having a dielectric constant value of less than about 3.9.

5. The method according to claim 4 , wherein:
the dielectric layer is made of one or more of SiCOH, boron-doped silicon dioxide, phosphorus-doped silicon dioxide, and boron phosphorus-doped silicon dioxide.

6. The method according to claim 1 , wherein forming the metal interconnect comprises:
forming a metal layer on the first barrier layer; and
planarizing the metal layer until a top surface of the dielectric layer is exposed, the planarized metal layer forming the metal interconnect.

7. The method according to claim 6 , wherein:
the metal layer is formed by an electroplating method.

8. The method according to claim 1 , wherein:
the metal interconnect is made of a material including copper.

9. The method according to claim 1 , wherein:
forming a second barrier layer on a top surface of the first barrier layer is after forming the first barrier layer and before forming the metal interconnect.

10. The method according to claim 9 , wherein:
the second barrier layer is made of a material including tantalum.

11. The method according to claim 9 , wherein:
the second barrier layer is formed by a physical vapor deposition process.

12. The method according to claim 9 , wherein:
a thickness of the second barrier layer is in a range of approximately 20 Å to 60 Å.

13. The method according to claim 1 , wherein:
the second barrier layer is formed directly on the first barrier layer and is not doped with manganese.

14. A method of forming a semiconductor structure, comprising:
providing a substrate;
forming a dielectric layer with an opening on the substrate;
forming a first barrier layer on sidewall and bottom surfaces of the opening, the first barrier layer being doped with manganese;
forming a second barrier layer on a top surface of the first barrier layer after forming the first barrier layer and before forming a metal interconnect; and
forming the metal interconnect on the first barrier layer, the metal interconnect being located within the opening, wherein the second barrier layer is formed by a physical vapor deposition process and the physical vapor deposition process uses:
a DC power in a range of approximately 5,000 W to 15,000 W;
an AC bias power in a range of approximately 200 W to 600 W;
a flow rate of argon in a range of approximately 5 standard ml/min˜30 standard ml/min; and
a pressure in a range of approximately 15 mTor˜60 mTorr.

15. The method according to claim 14 , wherein:
the first barrier layer is made of a material including tantalum nitride doped with manganese.

16. The method according to claim 15 , wherein:
the first barrier layer is formed by an atomic layer deposition process, and
forming the first barrier layer comprises:
introducing a tantalum source gas to the substrate, a portion of the tantalum source gas being adsorbed on the substrate;
evacuating the tantalum source gas that is not adsorbed on the substrate;
introducing a manganese source gas to the substrate, a portion of the manganese source gas being adsorbed on the substrate;
evacuating the manganese source gas that is not adsorbed on the substrate;
introducing a nitrogen source gas to the substrate, a portion of the nitrogen source gas being adsorbed on the substrate; and
evacuating the nitrogen source gas that is not adsorbed on the substrate.

17. The method according to claim 16 , wherein the atomic layer deposition process uses:
the tantalum source gas including C 10 H 30 N 5 Ta, with a flow rate in a range of approximately 500 standard ml/min˜1500 standard ml/min;
the manganese source gas including (C 5 H 5 ) 2 Mn, with a flow rate in a range of approximately 50 standard ml/min˜150 standard ml/min;
the nitrogen source gas including ammonia gas, with a flow rate in a range of approximately 500 standard ml/min˜2000 standard ml min;
a deposition temperature in a range of approximately 250° C.˜350° C.; and
a pressure in a reaction chamber in a range of approximately 2 Torr˜10 Torr.

18. The method according to claim 14 , wherein:
a thickness of the first barrier layer is in a range of approximately 15 Λ to 50 Å.

Assignees

• Semiconductor Mfg Int Shanghai Corp
• Semiconductor Mfg Int Beijing Corp

Inventors

• Deng Hao

Classifications

• H10P14/432

  using selective deposition · CPC title

• H10P14/47

  Electrolytic deposition, i.e. electroplating; Electroless plating · CPC title

• H10P14/44

  Physical vapour deposition [PVD] · CPC title

• H10P14/43

  Chemical deposition, e.g. chemical vapour deposition [CVD] · CPC title

• H10W20/48

  Insulating materials thereof · CPC title