Display apparatus and a method of driving the same

Patent metadata

Field	Value
Publication number	US-10482832-B2
Application number	US-201715462059-A
Country	US
Kind code	B2
Filing date	Mar 17, 2017
Priority date	May 13, 2016
Publication date	Nov 19, 2019
Grant date	Nov 19, 2019

Abstract

A display apparatus includes a display panel, a gate driving part, and a data driving part. The display panel is configured to display an image, and includes a gate line and a data line. The gate driving part is configured to output a gate signal to the gate line. The data driving part is configured to output a data signal to the data line. A transition time of the data signal is a time when the data signal transitions from a low level to a high level, and the transition time of the data signal increases according to a decrease of a load of the display panel.

First claim

What is claimed is:

1. A display apparatus comprising:
a display panel configured to display an image, and including a gate line and a data line;
a gate driving part configured to output a gate signal to the gate line; and
a data driving part configured to output a data signal to the data line,
wherein a transition time of the data signal is a time when the data signal transitions from a low level to a high level,
the transition time of the data signal increases according to a decrease of a load of the display panel,
the display panel sequentially comprises first to N-th (where N is a natural number not less than two) display areas in a direction in which the data line extends,
the data driving part outputs the data signal in response to a transfer pulse signal for controlling an output timing of the data signal,
a high period of the transfer pulse signal for controlling the output timing of the data signal applied to the first display area has a first period, and
a high period of the transfer pulse signal for controlling the output timing of the data signal applied to the N-th display area has an N-th period that is longer than the first period.

2. The display apparatus of claim 1 , wherein the transition time of the data signal, output from the data driving part and applied to the data line, increases as a distance between the data line and the data driving part decreases.

3. The display apparatus of claim 1 , wherein the transition time of the data signal, output from the data driving part and applied to the data line, increases as a resistor-capacitor (RC) resistance of the data line decreases.

4. The display apparatus of claim 1 , wherein
the transition time of the data signal, output from the data driving part and applied to the first display area, has a first time, and
the transition time of the data signal, output from the data driving part and applied to the N-th display area, has an N-th time that is shorter than the first time.

5. The display apparatus of claim 4 , wherein transition times of the data signal, applied to the first to (N−1)-th display areas, are controlled using the transition time of the data signal applied to the N-th display area and delayed.

6. The display apparatus of claim 5 , further comprising:
a lookup table configured to store transition time control data for controlling the transition times of the data signals applied to the first to N-th display areas.

7. The display apparatus of claim 1 , further comprising:
a lookup table configured to store transfer pulse data for controlling the high period of the transfer pulse signal.

8. The display apparatus of claim 1 , wherein the data driving part generates and outputs the data signal using image data to which luminance offset data, corresponding to the first to N-th display areas, is applied.

9. The display apparatus of claim 8 , further comprising:
a lookup table configured to store the luminance offset data.

10. The display apparatus of claim 4 , wherein the data driving part generates and outputs the data signal using image data, to which luminance offset data corresponding to the first to N-th display areas, is applied.

11. The display apparatus of claim 10 , further comprising:
a lookup table configured to store the luminance offset data.

12. The display apparatus of claim 1 , wherein when image data to be displayed on the display panel is a toggle pattern, the transition time of the data signal increases according to the decrease of the load of the display panel.

13. The display apparatus of claim 12 , wherein when the image data to be displayed on the display panel is a direct current pattern, the transition time of the data signal is maintained.

14. The display apparatus of claim 1 , wherein when image data to be displayed on the display panel includes a toggle pattern and a direct current pattern, the transition time of the data signal applied to an area displaying the toggle pattern increases according to the decrease of the load of the display panel, and the transition time of the data signal applied to an area displaying the direct current pattern is maintained.

15. A method of driving a display apparatus, the method comprising:
outputting a gate signal to a gate line of a display panel which displays an image; and
outputting a data signal to a data line,
wherein a transition time of the data signal is a time when the data signal transitions from a low level to a high level,
the transition time of the data signal increases when a load of the display panel decreases, and
when image data to be displayed on the display panel includes a toggle pattern and a direct current pattern, the transition time of the data signal applied to an area displaying the toggle pattern increases according to the decrease of the load of the display panel, and the transition time of the data signal applied to an area displaying the direct current pattern is maintained.

16. The method of claim 15 , wherein the display panel sequentially comprises first to N-th (where N is a natural number not less than two) display areas in a direction in which the data line extends,
the transition time of the data signal applied to the first display area has a first time, and
the transition time of the data signal applied to the N-th display area has an N-th time that is shorter than the first time.

17. The method of claim 15 , wherein transition times of the data signal, applied to the first to (N−1)-th display areas, are determined using the transition time of the data signal applied to the N-th display area and delayed.

18. The method of claim 17 , further comprising:
outputting a transfer pulse signal for controlling an output timing of the data signal,
wherein a high period of the transfer pulse signal for controlling the output timing of the data signal applied to the first display area has a first period, and
a high period of the transfer pulse signal for controlling the output timing of the data signal applied to the N-th display area has an N-th period that is longer than the first period.

19. A display apparatus comprising:
a display panel configured to display an image, and comprising a gate line and a data line;
a gate driving part configured to output a gate signal to the gate line;
a data driving part configured to output a data signal to the data line; and
a timing controlling part,
wherein the timing controlling part comprises:
a pattern detecting part configured to receive first image data, detect patterns in the first image data, and output pattern detection data;
a lookup table configured to store parameters corresponding to a plurality of display areas in the display panel; and
a micro controlling part configured to receive the first image data, generate second image data and transition time control data using the first image data, the pattern detection data, and the lookup table, and output the second image data and the transition time control data to the data driving part, and

wherein the transition time control data is used to control a transition time and a slew of the data signal.

Assignees

• Samsung Display Co Ltd

Inventors

• Jeon Byungkil
• Kang Sun-Koo
• Moon Seunghwan
• Lee Junpyo

Classifications

• G09G3/3648 Primary

  using an active matrix (G09G3/367 - G09G3/3696 take precedence) · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G2320/0223

  Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes · CPC title

• G09G3/3688

  suitable for active matrices only · CPC title

• G09G2330/045

  Protection against panel overheating · CPC title