Mask plate, method for manufacturing mask plate, method for using mask plate, and device including mask plate

US10481489B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10481489-B2
Application numberUS-201615537949-A
CountryUS
Kind codeB2
Filing dateAug 11, 2016
Priority dateApr 1, 2016
Publication dateNov 19, 2019
Grant dateNov 19, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A mask plate is provided. The mask plate includes a first transparent substrate. A first transparent electrode, an electrochromic layer and a second transparent electrode are arranged sequentially on the first transparent substrate. The first transparent electrode is configured to be selectively powered so as to form energized regions with different shapes. A method for manufacturing the mask plate, a device including the mask plate, and a method for using the mask plate are further provided.

First claim

Opening claim text (preview).

What is claimed is: 1. A mask plate, comprising: a first transparent substrate; first transparent electrode, an electrochromic layer and a second transparent electrode arranged sequentially on the first transparent substrate; and thin film transistor (TFT) array arranged between the first transparent substrate and the first transparent electrode and configured to selectively supply power to the first transparent electrode, herein the first transparent electrode is configured to be selectively powered to form energized regions with different shapes, the first transparent electrode is of a grid-like structure consisting of horizontal electrode lines and longitudinal electrode lines crossing each other. 2. The mask plate according to claim 1 , wherein the electrochromic layer comprises an electrochromic material layer, an ion conductive layer and an ion storage layer, and a sealant is provided at a periphery of each of the electrochromic material layer, the ion conductive layer and the ion storage layer. 3. The mask plate according to claim 1 , wherein a protection layer is arranged on the second transparent electrode. 4. The mask plate according to claim 1 , wherein the second transparent electrode is arranged on a second transparent substrate, and the second transparent substrate and the first transparent substrate are arranged opposite to each other to form a cell, so that the second transparent electrode is arranged between the electrochromic layer and the second transparent substrate. 5. The mask plate according to claim 4 , wherein the second transparent electrode is of a grid-like structure consisting of horizontal electrode lines and longitudinal electrode lines crossing each other. 6. The mask plate according to claim 5 , wherein another TFT array for supplying power to the second transparent electrode is further arranged between the second transparent electrode and the second transparent substrate. 7. The mask plate according to claim 4 , wherein the second transparent electrode comprises an array of electrode blocks. 8. The mask plate according to claim 1 , wherein the second transparent electrode is a complete conductive film layer, and the second transparent electrode is directly plated onto the electrochromic layer. 9. The mask plate according to claim 1 , wherein an insulation layer is arranged at an intersection between each longitudinal electrode line and a corresponding horizontal electrode line crossing the longitudinal electrode line. 10. The mask plate according to claim 1 , wherein each electrode line of the longitudinal electrode lines and the horizontal electrode lines is electrically connected to a drain electrode of a TFT unit of a TFT array adjacent to the electrode line. 11. A method for using the mask plate according to claim 1 in manufacture of a display panel, comprising, with respect to the display panels with different sizes, pre-storing a plurality of schemes for the mask plate in advance, wherein each scheme is provided to enable the mask plate to be provided with a light-shielding pattern corresponding to a corresponding display panel. 12. A method for manufacturing a mask plate, comprising: providing a first transparent substrate; providing a thin film transistor (TFT) array on the first transparent substrate; providing a first transparent electrode on the TFT array; forming an electrochromic layer on the first transparent electrode; and providing a second transparent electrode on the electrochromic layer, wherein the first transparent electrode is selectively powered by the TFT array to form energized regions with different shapes, the first transparent electrode is of a grid-like structure consisting of horizontal electrode lines and longitudinal electrode lines crossing each other and each electrode line is connected to a drain electrode of a TFT unit of the TFT array adjacent to the electrode line. 13. The method according to claim 12 , wherein the forming the electrochromic layer comprises forming an electrochromic material layer, an ion conductive layer and an ion storage layer sequentially, and the method further comprises providing a sealant at a periphery of each of the electrochromic material layer, the ion conductive layer and the ion storage layer. 14. The method according to claim 12 , wherein the providing the first transparent electrode further comprises providing an insulation layer at an intersection between every two electrode lines crossing each other.

Assignees

Inventors

Classifications

  • Filters, e.g. additive colour filters; Components for display devices · CPC title

  • Constructional details · CPC title

  • G02F1/155Primary

    Electrodes · CPC title

  • comprising inorganic material · CPC title

  • Gaskets; Spacers; Sealing of cells; Filling or closing of cells · CPC title

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Frequently asked questions

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What does patent US10481489B2 cover?
A mask plate is provided. The mask plate includes a first transparent substrate. A first transparent electrode, an electrochromic layer and a second transparent electrode are arranged sequentially on the first transparent substrate. The first transparent electrode is configured to be selectively powered so as to form energized regions with different shapes. A method for manufacturing the mask p…
Who is the assignee on this patent?
Boe Technology Group Co Ltd, Beijing Boe Display Tech Co
What technology area does this patent fall under?
Primary CPC classification G02F1/155. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 19 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).