Method for producing a nitride semiconductor component, and a nitride semiconductor component

Patent metadata

Field	Value
Publication number	US-10475959-B2
Application number	US-201615579561-A
Country	US
Kind code	B2
Filing date	Jun 15, 2016
Priority date	Jun 18, 2015
Publication date	Nov 12, 2019
Grant date	Nov 12, 2019

Abstract

The invention relates to a method for producing a nitride semiconductor component (100), comprising the steps of: —providing a growth substrate (1) having a growth surface (10) formed from a planar area (11) with a plurality of three-dimensionally shaped surface structures (12) on said planar area (11), —growing a nitride-based semiconductor layer sequence (30) on the growth surface (10), growth beginning selectively on a growth area (13) of said growth substrate, and the growth area (13) being less than 45% of the growth surface (10). The invention also relates to a nitride semiconductor component (100) which can be produced according to said method.

First claim

The invention claimed is:

1. A method for producing a nitride semiconductor component, comprising the following steps:
providing a structured growth substrate, the structured growth substrate having a growth surface formed from a planar area with a plurality of three-dimensionally shaped surface structures which are protrusions of the structured growth substrate that extend away from the planar area, wherein the protrusions of the structured growth substrate have a conical or pyramidal shape,
growing a nitride-based semiconductor layer sequence on the growth surface, the growing beginning selectively on a growth area of the growth substrate, wherein the growth area is less than 40% of the growth surface, and
depositing a layer on part of the planar area so as to reduce the growth area, the layer comprising a material on which growth of a nitride semiconductor layer material is difficult or impossible.

2. The method according to claim 1 , wherein the growth area is less than 25% of the growth surface.

3. The method according to claim 1 , wherein the growth area is less than 5% of the growth surface.

4. The method according to claim 1 , wherein the growth area is the planar area or part of the planar area.

5. The method according to claim 1 , wherein the growth area is smaller than the planar area.

6. The method according to claim 1 , wherein the material includes a silicon oxide, a silicon nitride, or a titanium nitride.

7. The method according to claim 1 , wherein the growth area is constituted by a plurality of non-interconnected portions of the planar area.

8. The method according to claim 7 , wherein the non-interconnected portions of the planar area abut on the three-dimensional structures.

9. The method according to claim 7 , wherein a layer is deposited on part of the planar area so as to reduce the growth area, which layer is of a material on which growth of a nitride semiconductor material is difficult or impossible, and wherein the non-interconnected portions of the planar area are openings in the layer of the material on which growth of a nitride semiconductor material is difficult or impossible.

10. The method according to claim 1 , wherein a nucleation layer is deposited on at least part of the planar area, which layer promotes the growth of a nitride semiconductor material thereon.

11. The method according to claim 10 , wherein the nucleation layer includes an oxygen-containing aluminum nitride.

12. The method according to claim 1 , wherein the growth substrate comprises sapphire.

13. A nitride semiconductor component, comprising:
a structured growth substrate, the structured growth substrate having a growth surface formed from a planar area with a plurality of three-dimensionally shaped surface structures which are protrusions of the structured growth substrate that extend away from the planar area, and
a nitride-based semiconductor layer sequence arranged on the growth surface,

wherein
the nitride-based semiconductor layer sequence has growth areas arranged on a growth area at an interface with the growth substrate,
the growth areas have a higher defect density than the rest of the semiconductor layer sequence,
the growth area is less than 45% of the growth surface, and
the protrusions of the structured growth substrate have a conical or pyramidal shape, and
a layer is deposited on part of the planar area so as to reduce the growth area, the layer comprising a material on which growth of a nitride semiconductor layer material is difficult or impossible.

14. The nitride semiconductor component according to claim 13 , wherein
the nitride semiconductor component is a radiation-emitting optoelectronic component, and
the growth substrate is transparent.

15. The nitride semiconductor component according to claim 14 , wherein the growth substrate is a sapphire substrate.

16. The nitride semiconductor component according to claim 13 , wherein a mirror layer is provided on a rear side of the growth substrate which faces away from the semiconductor layer sequence.

17. The nitride semiconductor component according to claim 13 , wherein the material includes a silicon oxide, a silicon nitride, or a titanium nitride.

Assignees

• Osram Opto Semiconductors Gmbh

Inventors

• Gotschke Tobias
• Galler Bastian
• Off Juergen
• Bergbauer Werner
• Lehnhardt Thomas

Classifications

• H01L33/22 Primary

  Electricity · mapped topic

• H01L33/007

  Electricity · mapped topic

• H01L33/0075

  Electricity · mapped topic

• H01L33/12

  Electricity · mapped topic

• H01L33/0079

  Electricity · mapped topic