Prefetch protocol for transactional memory

Patent metadata

Field	Value
Publication number	US-10474576-B2
Application number	US-201514936798-A
Country	US
Kind code	B2
Filing date	Nov 10, 2015
Priority date	Nov 10, 2015
Publication date	Nov 12, 2019
Grant date	Nov 12, 2019

Abstract

Enabling a prefetch request to be controlled in response to conditions in a receiver of the prefetch request and to conditions in a source of the prefetch request. One or more processors identify, based on a prefetch tag, a prefetch request that is associated with a prefetch instruction that is executed by a remote processor. The one or more processors generate the prefetch request in a remote processor according to a prefetch protocol. The prefetch request includes i) a description of at least one prefetch request operation and ii) a prefetch request information. A local processor, of the one or more processors, receives the prefetch request from the remote processor.

First claim

What is claimed is:

1. A computer program product to enable a prefetch request to be controlled in response to conditions in a receiver of the prefetch request and to conditions in a source of the prefetch request, the program instructions comprising:
one or more computer readable storage media and program instructions stored on the one or more computer readable storage media, the program instructions comprising:
program instructions to identify, based on a prefetch tag, a prefetch request that is associated with a prefetch instruction that is executed by a remote processor;
program instruction to determine a priority for processing the prefetch request based, at least in part, on a prefetch request information included in the prefetch request, wherein the prefetch request information indicates a priority associated with the source of the prefetch request;
program instructions to determine whether the prefetch request conflicts with a memory access associated with an atomic transaction;
program instructions to generate the prefetch request in a remote processor based on: (i) whether the prefetch request conflicts with the memory access associated with the atomic transaction, (ii) according to a prefetch protocol, wherein the prefetch request includes (a) a description of at least one prefetch request operation and (b) the prefetch request information, and (iii) a comparison of the priority for processing the prefetch request to a priority associated with the atomic transaction; and
program instructions to receive, by a local processor, the prefetch request from the remote processor.

2. The computer program product of claim 1 , wherein the prefetch request is one of a read prefetch instruction or a write prefetch instruction.

3. The computer program product of claim 1 , further comprising:
program instructions to execute the at least one prefetch request operation in the prefetch request in the local processor if the at least one prefetch request operation in the prefetch request does not conflict with a given atomic transaction in the local processor; and
program instructions to perform at least one action in the local processor on the prefetch request in accordance with the prefetch protocol and the prefetch request information if the prefetch request conflicts with a given atomic transaction in the local processor.

4. The computer program product of claim 3 , further comprising:
program instructions to notify the remote processor of the at least one action that was taken as part of a response to a read request.

5. The computer program product of claim 3 , wherein the at least one action includes one or more of (i) aborting a prefetch request operation in the prefetch request, (ii) performing a prefetch request operation in the prefetch request, (iii) delaying a prefetch request operation in the prefetch request, and (iv) quiescing a prefetch request operation in the prefetch request.

6. The computer program product of claim 3 , wherein the at least one action is based on the prefetch request information and at least one of (i) one or more conditions in the local processor, and (ii) one or more conditions in the remote processor.

7. The computer program product of claim 1 , wherein the prefetch request information includes one or more of (i) delay information, (ii) a priority of the remote processor, (iii) a priority of a prefetch request operation in the prefetch request, (iv) one or more conditions upon which to abort a prefetch request operation in the prefetch request, and (v) one or more conditions upon which to send a status of a prefetch request operation in the prefetch request to the remote processor.

8. The computer program product of claim 7 , wherein the delay information includes at least one of (i) a number of time steps, (ii) a number of cycles in the local processor, (iii) a first time period, (iv) a second time period that is greater than the first time period, (v) a long-range time period, and (vi) a prefetch time horizon.

9. The computer program product of claim 8 , wherein a time step included in the number of time steps includes at least one of (i) a number of instruction executions in the local processor, (ii) a number of instruction executions in the remote processor, and (iii) a number of cycles in the local processor.

10. The computer program product of claim 1 , wherein (I) the prefetch request information in a prefetch request includes a prefetch time horizon specified as a number of instruction executions at the source of the prefetch that is converted into a number of cycles at a given receiver of the prefetch request and (II) the determination of whether the prefetch request conflicts with the memory access associated with the atomic transaction is based on one or more of: (i) a comparison of a priority of the prefetch request with a priority of the atomic transaction, (ii) a comparison of a priority of the local processor with a priority of the remote processor, (iii) a determination of an associated level of importance of the prefetch request, and (iv) a comparison of a number of cycles expected to be remaining in the atomic transaction and an end time of the prefetch time horizon of the prefetch request.

11. A computer system to enable a prefetch request to be controlled in response to conditions in a receiver of the prefetch request and to conditions in a source of the prefetch request, the computer system comprising:
one or more computer processors;
one or more computer readable storage medium;
program instructions stored on the computer readable storage medium for execution by at least one of the one or more processors, the program instructions comprising:
program instructions to identify, based on a prefetch tag, a prefetch request that is associated with a prefetch instruction that is executed by a remote processor;
program instruction to determine a priority for processing the prefetch request based, at least in part, on a prefetch request information included in the prefetch request, wherein the prefetch request information indicates a priority associated with the source of the prefetch request;
program instructions to determine whether the prefetch request conflicts with a memory access associated with an atomic transaction;
program instructions to generate the prefetch request in a remote processor based on: (i) whether the prefetch request conflicts with the memory access associated with the atomic transaction, (ii) according to a prefetch protocol, wherein the prefetch request includes (a) a description of at least one prefetch request operation and (b) the prefetch request information, and (iii) a comparison of the priority for processing the prefetch request to a priority associated with the atomic transaction; and
program instructions to receive, by a local processor, the prefetch request from the remote processor.

12. The computer system of claim 11 , further comprising:
program instructions to execute the at least one prefetch request operation in the prefetch request in the local processor if the at least one prefetch request operation in the prefetch request does not conflict with an atomic transaction in the local processor; and
program instructions to perform at least one action in the local processor on the prefetch request in accordance with the prefetch protocol and the prefetch request information if the prefetch request conflicts with an atomic transaction in the local processor.

13. The computer system of claim 11 , wherein the prefetch request is one of a read prefetch instruction or a write prefetch instruction.

14. The computer system of claim 12 , further compr

Assignees

• IBM

Inventors

• Gschwind Michael Karl
• Salapura Valentina
• Shum Chung-Lung K

Classifications

• G06F2212/6028

  Prefetching based on hints or prefetch instructions · CPC title

• G06F12/0862 Primary

  with prefetch · CPC title

• G06F2212/602

  Details relating to cache prefetching · CPC title

• G06F12/0842

  for multiprocessing or multitasking · CPC title

• G06F12/084

  with a shared cache · CPC title