Current transducer with offset cancellation

US10473697B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10473697-B2
Application numberUS-201514676423-A
CountryUS
Kind codeB2
Filing dateApr 1, 2015
Priority dateApr 1, 2015
Publication dateNov 12, 2019
Grant dateNov 12, 2019

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

There is provided a system for use with a fiber-optic current transducer. The system includes a processing unit configured to transduce a first light signal into a first electrical signal. The processing unit is further configured to transduce a second light signal into a second electrical signal. Furthermore, the processing unit is configured to remove offsets from the first electrical signal and the second electrical signal by forcing the first electrical signal and the second electrical signal to be on the same per unit basis.

First claim

Opening claim text (preview).

What is claimed is: 1. A system, for use with a fiber-optic current transducer (FOCT), the system comprising: a processing unit configured to: convert a first light signal into a first electrical signal; convert a second light signal into a second electrical signal; calculate a first direct current (DC) offset of the first electrical signal; calculate a second direct current (DC) offset of the second electrical signal; calculate a difference value by subtracting the first DC offset of the first electrical signal from the second DC offset of the second electrical signal; calculate, based on the difference value, a first gain for the first electrical signal and a second gain for the second electrical signal; calculate a first adjusted DC offset by multiplying the first DC offset by the first gain; calculate a second adjusted DC offset by multiplying the second DC offset by the second gain; wherein the first gain and the second gain are determined such that the first adjusted DC offset is equal to the second adjusted DC offset; calculate a first adjusted electrical signal by multiplying the first electrical signal by the by the first gain; and calculate a second adjusted electrical signal by multiplying the second electrical signal by the second gain. 2. The system of claim 1 , further comprising a crystal that is configured to route the first light signal and the second light signal. 3. The system of claim 1 , wherein the first DC offset is calculated by integrating the first electrical signal with an integrator and the second DC offset is calculated by integrating the second electrical signal with the integrator. 4. The system of claim 3 , wherein the first DC offset is provided to a first summing junction to remove the first DC offset from the first electrical signal and the second DC offset is provided to a second summing junction to remove the second DC offset from the second electrical signal. 5. The system of claim 1 , wherein the first light signal and the second light signal are provided by light in a fiber that is reflected via a first path and a second path. 6. The system of claim 5 , wherein the fiber is positioned around a conductor. 7. The system of claim 1 , wherein the processing unit is configured to: calculate a first removed adjusted signal by subtracting the first adjusted DC offset from the first adjusted electrical signal; and calculate a second removed adjusted signal by subtracting the second adjusted DC offset from the second adjusted electrical signal. 8. The system of claim 7 , wherein the processing unit is configured to calculate a measured current signal by subtracting the first removed adjusted signal from the second removed adjusted signal. 9. The system of claim 1 , wherein the processing unit is configured to calculate a measured current signal by subtracting the first adjusted electrical signal from the second adjusted electrical signal. 10. The system of claim 1 , wherein the processing unit is configured to calculate a measured current signal by adding the first adjusted electrical signal to the second adjusted electrical signal.

Assignees

Inventors

Classifications

  • Details of the circuitry or construction of devices covered by G01R15/241 - G01R15/246 · CPC title

  • Arrangements for conditioning or analysing measured signals, e.g. for indicating peak values (G01R19/003 takes precedence); Details concerning sampling, digitizing or waveform capturing (displaying waveforms G01R13/00; analog sampling G01R19/0053) · CPC title

  • G01R15/246Primary

    based on the Faraday, i.e. linear magneto-optic, effect · CPC title

  • Compensating for temperature change · CPC title

  • G01R15/241Primary

    using electro-optical modulators, e.g. electro-absorption (probes containing electro-optic elements G01R1/071) · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10473697B2 cover?
There is provided a system for use with a fiber-optic current transducer. The system includes a processing unit configured to transduce a first light signal into a first electrical signal. The processing unit is further configured to transduce a second light signal into a second electrical signal. Furthermore, the processing unit is configured to remove offsets from the first electrical signal …
Who is the assignee on this patent?
Gen Electric
What technology area does this patent fall under?
Primary CPC classification G01R15/246. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 12 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).