Apparatus and method for generating temperature-indicating signal using correlated-oscillators

Patent metadata

Field	Value
Publication number	US-10473530-B2
Application number	US-201715681020-A
Country	US
Kind code	B2
Filing date	Aug 18, 2017
Priority date	Aug 18, 2017
Publication date	Nov 12, 2019
Grant date	Nov 12, 2019

Abstract

A temperature sensor configured to generate a temperature-indicating signal with improved accuracy over a wide temperature range is disclosed. The temperature sensor includes a first oscillator configured to generate a first oscillating signal with a first frequency that varies with a sensed temperature and a reference parameter; a second oscillator configured to generate a second oscillating signal with a second frequency that varies with the reference parameter; and a time-to-digital converter (TDC) configured to generate a digital output indicative of the sensed temperature based on a ratio of the first frequency to the second frequency. Because the first and second frequencies depend on the reference parameter, and the temperature-indicating signal is a function of the ratio of the first and second frequencies, temperature-variation in the reference parameter cancels out in the temperature-indicating signal.

First claim

What is claimed is:

1. An apparatus, comprising:
a first oscillator configured to generate a first oscillating signal with a first frequency that varies with a sensed temperature and a reference parameter, wherein the first oscillator comprises:
a set of cascaded series-connected inverter-transmission gate pairs including a first inverter-transmission gate pair and a last inverter-transmission gate pair, wherein an output of the last inverter-transmission gate pair is coupled to an input of the first inverter-transmission gate pair; and
a bias circuit configured to generate complementary bias voltages for complementary control inputs of each of the transmission gates, wherein a difference between the complementary bias voltages varies with the sensed temperature and the reference parameter;

a second oscillator configured to generate a second oscillating signal with a second frequency that varies with the reference parameter; and
a time-to-digital converter (TDC) configured to generate a digital output indicative of the sensed temperature based on a ratio of the first frequency to the second frequency.

2. The apparatus of claim 1 , wherein the first frequency of the first oscillating signal is based on a proportional to absolute temperature (PTAT) parameter.

3. The apparatus of claim 1 , wherein the first frequency of the first oscillating signal is based on a complementary to absolute temperature (CTAT) parameter.

4. The apparatus of claim 1 , wherein the reference parameter comprises a first reference current, wherein the bias circuit comprises a circuit configured to generate a proportional to absolute temperature (PTAT) current that varies as a function of the first reference current, and wherein the complementary bias voltages vary as a function of the PTAT current.

5. The apparatus of claim 4 , wherein the circuit comprises:
a first series path coupled between an upper voltage rail and a lower voltage rail, wherein the first series path comprises a current source, a first bipolar junction transistor (BJT), and a second BJT, wherein the current source is configured to generate the first reference current;
a second series path coupled between the upper voltage rail and the lower voltage rail, wherein the second series path comprises a first p-channel metal oxide semiconductor field effect transistor (PMOS FET), a third BJT, a fourth BJT, and a resistor;
wherein an emitter of the first BJT is coupled to a base of the fourth BJT, wherein an emitter of the third BJT is coupled to a base of the second BJT, and wherein the resistor is coupled between the emitter of the fourth BJT and the lower voltage rail;
a first n-channel metal oxide semiconductor field effect transistor (NMOS FET) coupled between the upper voltage rail and the bases of the first and third BJTs, wherein a gate of the first NMOS FET is coupled to a collector of the first BJT;
a third series path coupled between the upper voltage rail and the lower voltage rail, wherein the third series path comprises a second PMOS FET and a second NMOS FET, wherein a gate of the second PMOS FET is coupled to gate and drain of the first PMOS FET, and wherein the drain of the second NMOS FET is coupled to the gate of the second NMOS FET;
wherein the complementary bias voltages are generated at the drains of the first PMOS FET and the second NMOS FET, respectively.

6. The apparatus of claim 4 , wherein the second oscillator comprises
a ring oscillator including a set of cascaded series-connected inverter-transmission gate pairs including a first inverter-transmission gate pair and a last inverter-transmission gate pair, wherein an output of the last inverter-transmission gate pair is coupled to an input of the first inverter-transmission gate pair; and
a bias circuit configured to generate complementary bias voltages for complementary control inputs of each of the transmission gates, wherein a difference between the complementary bias voltages varies with the reference parameter;
wherein the reference parameter comprises a second reference current, wherein the bias circuit comprises a PMOS FET, a current source, and an NMOS FET coupled in series between an upper voltage rail and a lower voltage rail, wherein the current source is configured to generate the second reference current, wherein the second reference current is substantially identical to the first reference current, and wherein the complementary voltages are generated at drains of the PMOS FET and NMOS FET, respectively.

7. The apparatus of claim 4 , wherein the digital output is based on a ratio of the PTAT current to the first reference current.

8. The apparatus of claim 1 , wherein the TDC comprises:
a first counter configured to establish a time window based on the second oscillating signal; and
a second counter configured to generate the digital output based on a number of cycles of the first oscillating signal that occur within the time window.

9. The apparatus of claim 8 , wherein the first counter is configured to assert a latch signal every 2 n cycles of the first oscillating signal, and wherein the time window is based on a duration between adjacent asserted latch signals.

10. A method comprising:
generating a first oscillating signal with a first frequency that varies with a sensed temperature and a reference parameter, wherein generating the first oscillating signal comprises applying complementary bias voltages to a set of transmission gates coupled between a set of inverters, respectively, wherein the complementary bias voltages vary with the sensed temperature and the reference parameter;
generating a second oscillating signal with a second frequency that varies with the reference parameter; and
generating a signal indicative of the sensed temperature based on a ratio of the first frequency to the second frequency.

11. The method of claim 10 , wherein the first frequency of the first oscillating signal is based on a proportional to absolute temperature (PTAT) parameter.

12. The method of claim 10 , wherein the first frequency of the first oscillating signal is based on a complementary to absolute temperature (CTAT) parameter.

13. The method of claim 10 , wherein generating the second oscillating signal comprises applying complementary bias voltages to a set of transmission gates coupled between a set of inverters, respectively, wherein the complementary bias voltages vary with the reference parameter.

14. An apparatus comprising:
means for generating a first oscillating signal with a first frequency that varies with a sensed temperature and a reference parameter, wherein the means for generating the first oscillating signal comprises:
a ring oscillator comprising:
a set of inverters;
a set of transmission gates situated between the set of inverters, respectively; and
means for applying complementary bias voltages to the set of transmission gates, wherein the complementary bias voltages vary with the sensed temperature and the reference parameter;

means for generating a second oscillating signal with a second frequency that varies with the reference parameter; and
means for generating a signal indicative of the sensed temperature based on a ratio of the first frequency to the second frequency.

15. The apparatus of claim 14 , wherein the first frequency of the first oscillating signal is based on a proportional to absolute temperature (PTAT) parameter.

16. The apparatus of claim 14 , wherein the first frequency of the first oscillating signal is based on a complementary to absolute temperature (CTAT) parameter.

17. The apparatus

Assignees

• Qualcomm Inc

Inventors

• Fan Philex Ming-Yan
• Nguyen Richard
• Poojary Manjunatha

Classifications

• G01K7/32

  using change of resonant frequency of a crystal · CPC title

• G04F10/005

  Time-to-digital converters [TDC] (analog-to-digital converters with intermediate conversion to time or phase H03M1/50, H03M1/60) · CPC title

• H03K3/0315

  Ring oscillators · CPC title

• G01K7/015 Primary

  using microstructures, e.g. made of silicon · CPC title

• G01K7/16 Primary

  using resistive elements · CPC title