Indium phosphide substrate, method of inspecting indium phosphide substrate, and method of producing indium phosphide substrate

Patent metadata

Field	Value
Publication number	US-10473445-B2
Application number	US-201515541754-A
Country	US
Kind code	B2
Filing date	Dec 7, 2015
Priority date	Feb 9, 2015
Publication date	Nov 12, 2019
Grant date	Nov 12, 2019

Abstract

An indium phosphide substrate, a method of inspecting thereof and a method of producing thereof are provided, by which an epitaxial film grown on the substrate is rendered excellently uniform, thereby allowing improvement in PL characteristics and electrical characteristics of an epitaxial wafer formed using this epitaxial film. The indium phosphide substrate has a first main surface and a second main surface, a surface roughness Ra1 at a center position on the first main surface, and surface roughnesses Ra2, Ra3, Ra4, and Ra5 at four positions arranged equidistantly along an outer edge of the first main surface and located at a distance of 5 mm inwardly from the outer edge. An average value m1 of the surface roughnesses Ra1, Ra2, Ra3, Ra4, and Ra5 is 0.5 nm or less, and a standard deviation σ1 of the surface roughnesses Ra1, Ra2, Ra3, Ra4, and Ra5 is 0.2 nm or less.

First claim

The invention claimed is:

1. An indium phosphide substrate having a first main surface and a second main surface,
the first main surface having a surface roughness Ra 1 at a center position and surface roughnesses Ra 2 , Ra 3 , Ra 4 , and Ra 5 at four positions, the four positions being arranged equidistantly along an outer edge of the first main surface and located at a distance of 5 mm inwardly from the outer edge,
an average value m 1 of the surface roughnesses Ra 1 , Ra 2 , Ra 3 , Ra 4 , and Ra 5 being 0.4 nm or less,
a standard deviation σ 1 of the surface roughnesses Ra 1 , Ra 2 , Ra 3 , Ra 4 , and Ra 5 being 10% or less of the average value m 1 ,
the second main surface having a surface roughness Ra 6 at a center position and surface roughnesses Ra 7 , Ra 8 , Ra 9 , and Ra 10 at four positions, the four positions being arranged equidistantly along an outer edge of the second main surface and located at a distance of 5 mm inwardly from the outer edge,
an average value m 2 of the surface roughnesses Ra 6 , Ra 7 , Ra 8 , Ra 9 , and Ra 10 being 0.2 am or more and 3 am or less, and
a standard deviation σ 2 of the surface roughnesses Ra 6 , Ra 7 , Ra 8 , Ra 9 , and Ra 10 being 10% or less of the average value m 2 .

2. The indium phosphide substrate according to claim 1 , wherein the indium phosphide substrate has a maximum diameter of 150 mm or more.

3. A method of producing an indium phosphide substrate according to claim 1 , the method comprising:
preparing an indium phosphide wafer having a first main surface and a second main surface;
double-side polishing the first main surface and the second main surface of the indium phosphide wafer using a first polishing cloth;
single-side finish polishing the first main surface of the double-side polished indium phosphide wafer using a second polishing cloth; and
washing the single-side finish polished indium phosphide wafer.

Assignees

• Sumitomo Electric Industries

Inventors

• Fujiwara Shinya
• Higuchi Yasuaki

Classifications

• H10P14/3218

  Phosphides · CPC title

• H10P14/2925

  Surface structures · CPC title

• H10P14/2909

  Phosphides · CPC title

• H10P90/129

  by polishing · CPC title

• H10P90/124

  by processing the backside of the wafers · CPC title