Printed circuit board, printed wiring board, and differential transmission circuit

US10470296B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10470296-B2
Application numberUS-201515518135-A
CountryUS
Kind codeB2
Filing dateOct 22, 2015
Priority dateNov 4, 2014
Publication dateNov 5, 2019
Grant dateNov 5, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Provided is a printed circuit board including a first semiconductor device and a second semiconductor device mounted on a printed wiring board, the printed wiring board including a first and a second differential signal wirings each formed of a pair of signal transmission lines. The pair of signal transmission lines forming the first differential signal wiring are wired to have a relative arrangement in which one signal transmission line and another signal transmission line cross with each other at least once in the first differential signal wiring in a wiring direction thereof. The pair of signal transmission lines forming the second differential signal wiring are wired to have a relative arrangement in which one signal transmission line and another signal transmission line cross with each other at least once in the second differential signal wiring in a wiring direction thereof.

First claim

Opening claim text (preview).

The invention claimed is: 1. A printed circuit board, comprising: a first semiconductor device configured to input and output a signal; a second semiconductor device configured to input and output a signal; and a printed wiring board having the first semiconductor device and the second semiconductor device mounted thereon, the printed wiring board comprising: a first differential signal wiring formed of a pair of signal transmission lines, the first differential signal wiring connecting the first semiconductor device and the second semiconductor device to each other, wherein the pair of signal transmission lines forming the first differential signal wiring comprises a first signal transmission line and a second signal transmission line; and a second differential signal wiring formed of a pair of signal transmission lines, the second differential signal wiring connecting the first semiconductor device and the second semiconductor device to each other and being arranged in parallel to the first differential signal wiring, the first differential signal wiring and the second differential signal wiring being arranged without any other differential wirings therebetween, wherein the pair of signal transmission lines forming the second differential signal wiring comprises a third signal transmission line and a fourth signal transmission line, wherein the pair of signal transmission lines forming the first differential signal wiring are wired to have a relative arrangement in which, when viewed in plan from a direction perpendicular to a surface of the printed wiring board, the first signal transmission line and the second signal transmission line cross with each other at least once in the first differential signal wiring in a wiring direction thereof, wherein the pair of signal transmission lines forming the second differential signal wiring are wired to have a relative arrangement in which, when viewed in plan from the direction perpendicular to the surface of the printed wiring board, the third signal transmission line and the fourth signal transmission line cross with each other at least once in the second differential signal wiring in a wiring direction thereof, wherein the number of crossings of the pair of signal transmission lines forming the first differential signal wiring is equal to the number of crossings of the pair of signal transmission lines forming the second differential signal wiring, and wherein each of the crossings of the pair of signal transmission lines forming the first differential signal wiring and corresponding one of the crossings of the pair of signal transmission lines forming the second differential signal wiring are arranged side by side. 2. The printed circuit board according to claim 1 , wherein signals flowing through one of the first or second signal transmission lines included in the first differential signal wiring and one of the third or fourth signal transmission lines included in the second differential signal wiring, which are adjacent to each other without any other differential wirings therebetween when viewed in plan from the direction perpendicular to the surface of the printed wiring board, are in phase. 3. The printed circuit board according to claim 1 , wherein the second signal transmission line and the third signal transmission line are connected to the first semiconductor device in a state in which the second signal transmission line and the third signal transmission line are arranged without any other differential wirings therebetween, wherein signals flowing through the first signal transmission line and the fourth signal transmission line are in phase, and wherein signals flowing through the second signal transmission line and the third signal transmission line are in phase. 4. The printed circuit board according to claim 1 , wherein, when viewed in plan from the direction perpendicular to the surface of the printed wiring board, a distance between the crossings of the pair of signal transmission lines forming the first differential signal wiring and the first semiconductor device and a distance between the crossings of the pair of signal transmission lines forming the second differential signal wiring and the first semiconductor device are substantially the same, and wherein, when viewed in plan from the direction perpendicular to the surface of the printed wiring board, a wiring length along which the first signal transmission line and the third signal transmission line are arranged adjacent to each other and a wiring length along which the second signal transmission line and the fourth signal transmission line are arranged adjacent to each other are substantially equal to each other. 5. The printed circuit board according to claim 1 , wherein the first signal transmission line comprises a first wiring pattern formed on the first semiconductor device side and a second wiring pattern formed on the second semiconductor device side when viewed from a region in which the first signal transmission line and the second signal transmission line cross with each other, wherein the second signal transmission line comprises a third wiring pattern formed on the first semiconductor device side and a fourth wiring pattern formed on the second semiconductor device side when viewed from the region in which the first signal transmission line and the second signal transmission line cross with each other, wherein the third signal transmission line comprises a fifth wiring pattern formed on the first semiconductor device side and a sixth wiring pattern formed on the second semiconductor device side when viewed from a region in which the third signal transmission line and the fourth signal transmission line cross with each other, wherein the fourth signal transmission line comprises a seventh wiring pattern formed on the first semiconductor device side and an eighth wiring pattern formed on the second semiconductor device side when viewed from the region in which the third signal transmission line and the fourth signal transmission line cross with each other, and wherein, when viewed in plan from the direction perpendicular to the surface of the printed wiring board, the third wiring pattern and the fifth wiring pattern are adjacent to each other, the second wiring pattern and the eighth wiring pattern are adjacent to each other, and a wiring length along which the third wiring pattern and the fifth wiring pattern are adjacent to each other and a wiring length along which the second wiring pattern and the eighth wiring pattern are adjacent to each other are substantially equal to each other. 6. The printed circuit board according to claim 1 , wherein, when viewed in plan from the direction perpendicular to the surface of the printed wiring board, the first signal transmission line and the second signal transmission line are wired to cross with each other twice in the first differential signal wiring in the wiring direction thereof, wherein, when viewed in plan from the direction perpendicular to the surface of the printed wiring board, the third signal transmission line and the fourth signal transmission line are wired to cross with each other twice in the second differential signal wiring in the wiring direction thereof, wherein the first signal transmission line comprises: a first wiring pattern formed on the first semiconductor device side when viewed from a region in which the first signal transmission line positioned on the first semiconductor device side and the second signal transmission line cross with each other; a second wiring pattern formed between the region in which the first signal transmission line positioned on the first semiconductor device side and the second signal transmission line cross with each other and a region in which the first

Assignees

Inventors

Classifications

  • Memory · CPC title

  • Printed circuits associated with mounted high frequency components · CPC title

  • Crossing layout · CPC title

  • H05K1/0245Primary

    Lay-out of balanced signal pairs, e.g. differential lines or twisted lines · CPC title

  • Compensation of cross-talk by a mutually correlated lay-out of printed circuit traces, e.g. for compensation of cross-talk in mounted connectors (balanced signal pairs H05K1/0245) · CPC title

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Frequently asked questions

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What does patent US10470296B2 cover?
Provided is a printed circuit board including a first semiconductor device and a second semiconductor device mounted on a printed wiring board, the printed wiring board including a first and a second differential signal wirings each formed of a pair of signal transmission lines. The pair of signal transmission lines forming the first differential signal wiring are wired to have a relative arran…
Who is the assignee on this patent?
Canon Kk
What technology area does this patent fall under?
Primary CPC classification H05K1/0245. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 05 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).