Amplifier circuit for compensating an output signal from a circuit

US10469034B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10469034-B2
Application numberUS-201515767384-A
CountryUS
Kind codeB2
Filing dateNov 9, 2015
Priority dateNov 9, 2015
Publication dateNov 5, 2019
Grant dateNov 5, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An amplifier circuit ( 200 ) for compensating an output signal provided at an output ( 212 ) of a circuit ( 210 ) is disclosed. The amplifier circuit ( 200 ) comprises an output transmission line ( 230 ) connected between the output ( 212 ) of the circuit ( 210 ) and an output port ( 240 ) and an amplifier ( 220 ). The amplifier ( 220 ) comprises multiple sub-amplifiers ( 221, 222, 223, 224 ), inputs of the multiple sub-amplifiers ( 221, 222, 223, 224 ) are coupled to an input transmission line ( 250 ) for receiving an error signal; and outputs of the multiple sub-amplifiers ( 221, 222, 223, 224 ) are coupled at respective places along the output transmission line ( 230 ) to inject a compensation signal to the output port ( 240 ). The error signal is derived from a reference input signal and the output signal of the circuit ( 210 ), and is amplified in the amplifier ( 220 ) into the compensation signal.

First claim

Opening claim text (preview).

The invention claimed is: 1. An amplifier circuit for compensating an output signal provided at an output of a circuit, the amplifier circuit comprising: an output transmission line connected between the output of the circuit and an output port; an amplifier comprising multiple sub-amplifiers for amplifying an error signal into compensation signals; wherein inputs of the multiple sub-amplifiers are coupled to an input transmission line at different places with a distance between the different places along the input transmission line for receiving the error signal derived from a reference input signal and the output signal of the circuit; and wherein outputs of the multiple sub-amplifiers are coupled to the output transmission line at different places with a distance between the different places along the output transmission line to inject the compensation signals to the output port. 2. The amplifier circuit of claim 1 , wherein the multiple sub-amplifiers are further configured to reduce backwards traveling of the compensation signal to the output of the circuit by configuring the number of sub-amplifiers, output currents from the multiple sub-amplifiers, and the distance between the different places along the output transmission line. 3. The amplifier circuit of claim 1 , wherein the distance between the different places along the output transmission line is a quarter wavelength at a center frequency of operating frequency band of the circuit. 4. The amplifier circuit of claim 1 , wherein the outputs of the multiple sub-amplifiers are connected directly to the output transmission line. 5. The amplifier circuit of claim 1 , wherein output currents from the multiple sub-amplifiers are bell-shape weighted according to a window function. 6. The amplifier circuit of claim 5 , wherein the window function is any one of Dolph-Chebyshev, Gaussian, Binomial, Hamming, or Blackman functions, or a combination thereof. 7. The amplifier circuit of claim 1 : wherein segments of the output transmission line between the sub-amplifiers have the same characteristic impedance; and wherein supply voltages for the sub-amplifiers are increased along the output transmission line towards the output port. 8. The amplifier circuit of claim 1 : wherein the sub-amplifiers have same supply voltage; and wherein characteristic impedance of segments of the output transmission line between the sub-amplifiers decreases along the output transmission line towards the output port. 9. The amplifier circuit of claim 1 , wherein the sub-amplifiers are unit-sized sub-amplifiers with same output current, or have discrete, small-integer sizes. 10. An electronic device, comprising: an amplifier circuit for compensating an output signal provided at an output of a circuit, the amplifier circuit comprising: an output transmission line connected between the output of the circuit and an output port; an amplifier comprising multiple sub-amplifiers for amplifying an error signal into compensation signals; wherein inputs of the multiple sub-amplifiers are coupled to an input transmission line at different places with a distance between the different places along the input transmission line for receiving the error signal derived from a reference input signal and the output signal of the circuit; and wherein outputs of the multiple sub-amplifiers are coupled to the output transmission line at different places with a distance between the different places along the output transmission line to inject the compensation signals to the output port. 11. The electronic device of claim 10 , wherein the electronic device is a radio frequency transceiver, a wireless communication device, a user equipment, a mobile device, a base station, or a radio network node.

Assignees

Inventors

Classifications

  • with semiconductor devices only · CPC title

  • Combinations of several amplifiers · CPC title

  • the amplifier being a radio frequency amplifier · CPC title

  • Amplifier output adaptation especially for transmission line coupling purposes, e.g. impedance adaptation · CPC title

  • A hybrid coupler being used as power measuring circuit at the input of an amplifier circuit · CPC title

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Frequently asked questions

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What does patent US10469034B2 cover?
An amplifier circuit ( 200 ) for compensating an output signal provided at an output ( 212 ) of a circuit ( 210 ) is disclosed. The amplifier circuit ( 200 ) comprises an output transmission line ( 230 ) connected between the output ( 212 ) of the circuit ( 210 ) and an output port ( 240 ) and an amplifier ( 220 ). The amplifier ( 220 ) comprises multiple sub-amplifiers ( 221, 222, 223, 224 ), …
Who is the assignee on this patent?
Ericsson Telefon Ab L M
What technology area does this patent fall under?
Primary CPC classification H03F1/0288. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 05 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).