High voltage transmit / receive switch and voltage detection circuit

Patent metadata

Field	Value
Publication number	US-10468869-B2
Application number	US-201715461921-A
Country	US
Kind code	B2
Filing date	Mar 17, 2017
Priority date	Mar 22, 2016
Publication date	Nov 5, 2019
Grant date	Nov 5, 2019

Abstract

An analog transmit/receive switch and voltage detection circuit that do not require depletion mode devices are provided. The switch may be configured to operate in a receive mode and a protection mode. The voltage detection circuit may be coupled to the switch and may be configured to measure a potential difference between two terminals of the switch. The switch and the voltage detection circuit may not include any depletion mode devices.

First claim

What is claimed is:

1. An apparatus comprising:
a switch configured to operate in a closed circuit mode and an open circuit mode; and
a voltage detection circuit coupled to the switch that measures a potential difference between two terminals of the switch;
wherein the switch and the voltage detection circuit do not include any depletion mode devices;
wherein the switch comprises first and second NMOS transistors whose source terminals are coupled together;
wherein the switch further comprises a third transistor and a fourth transistor configured to turn off the switch;
wherein source terminals of the third and fourth transistors are coupled to the source terminals of the first and second NMOS transistors; and
wherein drain terminals of the third and fourth transistors are coupled to gate terminals of the first and second NMOS transistors.

2. The apparatus of claim 1 , wherein the switch does not include any PMOS transistors.

3. The apparatus of claim 1 , wherein the voltage detection circuit comprises first and second rheostats configured to measure the potential difference between the two terminals of the switch; and
wherein a gate terminal of the third transistor is coupled to the first rheostat, and a gate terminal of the fourth transistor is coupled to the second rheostat.

4. The apparatus of claim 3 , wherein the switch is configured to switch between the closed circuit mode and the open circuit mode based on a threshold voltage of the third transistor or a threshold voltage of the fourth transistor.

5. The apparatus of claim 1 , wherein the third and fourth transistors are NMOS transistors.

6. The apparatus of claim 1 , wherein in closed circuit mode, the resistance of the switch is substantially constant.

7. The apparatus of claim 1 , wherein in the open circuit mode, the switch operates as a high-impedance constant current source that holds an electrical current.

Assignees

• Microchip Tech Inc

Inventors

• Ko Isaac
• Ho Ka Wai
• Chan Wan Tim

Classifications

• H03K17/6874

  in a symmetrical configuration · CPC title

• H03K17/08122 Primary

  in field-effect transistor switches · CPC title

• H04B11/00

  Transmission systems employing ultrasonic, sonic or infrasonic waves · CPC title

• H03K2217/0054

  Gating switches, e.g. pass gates · CPC title

• H02H3/20 Primary

  responsive to excess voltage · CPC title